¡ Semiconductor

MSC1163

12/13

FUNCTIONAL DESCRIPTION

Notes on Use

1. The MSC1163GS is designed as an anode driver of VFD.

The data applied to the data input pin is read into the shift register at the rising edge

of the clock and shifted sequencially to the shift register synchronizing with the

clock.

The shift register output drives the output driver, passing through the latch and the

NOR circuit.

Setting the CL pin to "L" makes all driver outputs go into "L". This function can be

used for setting display blanking.

2. The contents of the shift register are undefined after power is turned on.

Therefore, two or more driver outputs may go into "H" at the same time after power-

on.

To avoid this, take the following procedure:

1) Turn on the power of the logic portion while holding the CL pin to "L".

2) Turn on the power of the driver portion.

3) Apply a "L" level signal to the DIN pin and send clock pulses by the specified

number of grids to reset ("L") the entire contents of the shift register.

CLK

R-1

R/L

H

H

H

L

R1n

R1n

R2n

R2n

R3n

R3n

R39n

R39n

R39n

R39n

CL

CHG

LS

X

H

L

L

X

X

H

H

L

H

H

L

X

X

H

L

R.X

HVO.X

L

H

H

H

LL

NC

X

H

DOUT

R-40

• • • • • • • •

R-4

R-3

R-2

L

L

R2n

R2n

R3n

R3n

R4n

R4n

R5n

R5n

H

L

R2n

R2n

DIN

H

L

H

L

Function Table

L : Low Level, H: High Level, X: Don't Care, NC: No Change