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L8200L-P16-R 数据表(PDF) 5 Page - Unisonic Technologies

部件名 L8200L-P16-R
功能描述  SINGLE LNB-BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
PDF  6 Pages
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制造商  UTC [Unisonic Technologies]
网页  http://www.utc-ic.com
标志 UTC - Unisonic Technologies

L8200L-P16-R 数据表(HTML) 5 Page - Unisonic Technologies

  L8200L-P16-R Datasheet HTML 1Page - Unisonic Technologies L8200L-P16-R Datasheet HTML 2Page - Unisonic Technologies L8200L-P16-R Datasheet HTML 3Page - Unisonic Technologies L8200L-P16-R Datasheet HTML 4Page - Unisonic Technologies L8200L-P16-R Datasheet HTML 5Page - Unisonic Technologies L8200L-P16-R Datasheet HTML 6Page - Unisonic Technologies  
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L8200
LINEAR INTEGRATED CIRCUIT
UNISONIC TECHNOLOGIES CO., LTD
5 of 6
www.unisonic.com.tw
QW-R123-017.G
T Y PI CAL APPLI CAT I ON CI RCU I T
UTC L8200
G1
D1
D2
G2
VOUT
HB
LB
CSUB
JF1
C*
L*
C1
10nF
L*
C*
C2
10nF
* Stripline Elements
22k
Ω
22k
Ω
47nF
To other FET stages
Power supply for IF Amps
RL1
RH1
RL2
QL
CL1
RH2
9.75GHz Local Osc.
10.6GHz Local Osc.
QH
CH1
LNB power and tone signal
Capacitors C1 and C2 ensure that residual power supply and substrate generator noise is not allowed to affect
other external circuits which may be sensitive to RF interference. They also serve to suppress any potential RF feed
through between stages via the UTC L8200. These capacitors are required for all stages used. Values of 10nF and
4.7nF respectively are recommended however this is design dependent and any value between 1nF and 100nF
could be used. The capacitor CSUB is an integral part of the UTC L8200 ’s negative supply generator. The negative
bias voltage is generated on-chip using an internal oscillator. The required value of capacitor CSUB is 47nF. This
generator produces a low current supply of approximately -3V. Although this generator is intended purely to bias the
external FETs, it can be used to power other external low current circuits via the CSUB pin. Resistor RCALA sets the
drain current at which all external amplifier FETs are operated and RCALM sets the mixer bias current. If any bias
control circuit is not required, its related drain and gate connections may be left open circuit without affecting the
operation of the remaining bias circuits. The UTC L8200 have been designed to protect the external FETs form
adverse operating conditions. With a JFET connected to any bias circuit, the gate output voltage of the bias circuit
can not exceed the range -3.0V~1V under any conditions, including power up and power down transients. Should
the negative bias generator be shorted or overloaded so that the drain current of the external FETs can no longer be
controlled, the drain supply to FETs is shut down to avoid damage to the FETs by excessive drain current. UTC
L8200
incorporates over and under voltage protection so is the receiver or installation develops a fault the LNB will
shut down and restart once operating conditions are back to normal.



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