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LTC6905CS5 数据表(PDF) 7 Page - Linear Technology |
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LTC6905CS5 数据表(HTML) 7 Page - Linear Technology |
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7 / 8 page ![]() LTC6905 7 6905fa APPLICATIO S I FOR ATIO JITTER AND STRAY CAPACITANCE ON THE SET PIN (PIN 3) The stray capacitance on the SET pin (Pin 3) should be limited to 10pF or less to avoid increased jitter or unstable oscillation. LTC6905 SUGGESTED CRITICAL COMPONENT LAYOUT In order to provide the specified performance, it is re- quired that the frequency setting resistor RSET and the supply bypass capacitor be placed as close as possible to the LTC6905. The following additional rules should be followed for best performance: 1) The bypass capacitor must be placed as close as possible to the LTC6905, and no vias should be placed between the capacitor and the LTC6905. The bypass capacitor must be on the same side of the circuit board as the LTC6905. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 2) The resistor RSET should be placed as close as possible to the LTC6905, and the connection of RSET to VCC should be closely shared with the bypass capacitor. The resistor RSET may be placed on the opposite side of the board from the LTC6905, directly underneath the by- pass capacitor. 3) If a ground plane is used, the connection of the LTC6905 to the ground plane should be as close as possible to the LTC6905 GND pin and should be composed of multiple, high current capacity vias. PACKAGE DESCRIPTIO S5 Package 5-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1635) 1.50 – 1.75 (NOTE 4) 2.80 BSC 0.30 – 0.45 TYP 5 PLCS (NOTE 3) DATUM ‘A’ 0.09 – 0.20 (NOTE 3) S5 TSOT-23 0302 PIN ONE 2.90 BSC (NOTE 4) 0.95 BSC 1.90 BSC 0.80 – 0.90 1.00 MAX 0.01 – 0.10 0.20 BSC 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 3.85 MAX 0.62 MAX 0.95 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 1.4 MIN 2.62 REF 1.22 REF Figure 2. LTC6905 Suggested Critical Component Layout LTC6905 6905 F02 C R |
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