5

IXDF504 / IXDI504 / IXDN504

SYMBOL

FUNCTION

DESCRIPTION

IN A

A Channel Input

A channel input signal-TTL or CMOS compatible.

GND

Ground

The system ground pin. Internally connected to all circuitry, this pin provides

ground reference for the entire device. This pin should be connected to a

low noise analog ground plane for optimum performance.

IN B

B Channel Input

B channel input signal-TTL or CMOS compatible.

OUT B

B Channel Output

B channel driver output. For application purposes, this pin is connected via a

resistor to the gate of a MOSFET/IGBT.

VCC

Supply Voltage

Positive power-supply voltage input. This pin provides power to the entire

device. The range for this voltage is from 4.5V to 30V.

OUT A

A Channel Output

A channel criver output. For application purposes, this pin is connected via a

resistor to the gate of a MOSFET/IGBT.

Pin Description

Figure 4 - Characteristics Test Diagram

CAUTION: Follow proper ESD procedures when handling and assembling this component.

1

2

3

4

5

6

7

8

NC

NC

In A

Gnd

In B

Out B

Vcc

Out A

10uF

Vcc

C

LOAD

Agilent 1147A

Current Probe

Agilent 1147A

Current Probe

C

LOAD

0.01uF

IXD_504

1

2

3

4

5

6

7

8

IN A

GND

INB

OUT A

V

S

OUT B

NC

NC

8 Lead PDIP (PI)

8 Pin SOIC (SI)

IXDN402

1

2

3

4

5

6

7

8

IN A

GND

INB

OUT A

V

S

OUT B

NC

NC

8 Lead PDIP (PI)

8 Pin SOIC (SI)

IXDI402

1

2

3

4

5

6

7

8

IN A

GND

INB

OUT A

V

S

OUT B

NC

NC

8 Lead PDIP (PI)

8 Pin SOIC (SI)

IXDF402

IXDN504

IXDI504

IXDF504

(SIA)

(SIA)

(SIA)

1

2

3

4

5

6

GND

IN A

IN B

OUT A

OUT B

Vcc

6 Lead DFN (D1)

6 Lead DFN (D1)

6 Lead DFN (D1)

(Bottom View)

1

2

3

4

5

6

IN A

IN B

OUT A

GND

OUT B

Vcc

1

2

3

4

5

6

OUT B

Vcc

IN A

GND

IN B

OUT A

IXYS reserves the right to change limits, test conditions, and dimensions.

Pin Configurations

NOTE: Solder tabs on bottoms of DFN packages are grounded

(Bottom View)

(Bottom View)