71321LA55TFGI datasheet(5/18 Pages) IDT

5 / 18 page

6.42

IDT71321SA/LA and IDT71421SA/LA

High Speed 2K x 8 Dual-Port Static RAM with Interrupts

Industrial and Commercial Temperature Ranges

DC Ele c t ric a l Cha ra c t e rist ic s Ove r t he Ope ra t ing

Te m pe ra t ure a nd Supply Volt a ge Ra nge (V CC = 5 .0 V ± 1 0 % )

NOTE:

1. At Vcc < 2.0V leakages are undefined.

Da t a Re t e nt ion Cha ra c t e rist ic s (LA Version Only)

NOTES:

1. VCC = 2V, TA = +25°C, and is not production tested.

2. tRC = Read Cycle Time

3. This parameter is guaranteed but not production tested.

Dat a Re t e nt ion Wa ve for m

VCC

4.5V

DATA RETENTION MODE

tCDR

VIH

VDR

2.0V

2691 drw 04

≥

Symbol

Parameter

Test Conditions

71321SA

71421SA

71321LA

71421LA

Unit

Min.

Max.

Min.

Max.

|ILI|

Input Leakage Current(1)

VCC = 5.5V, VIN = 0V to VCC

___

5µA

|ILO|

Output Leakage Current(1)

CE = VIH, VOUT = 0V to VCC,

VCC - 5.5V

___

5µA

VOL

Output Low Voltage (I/O0-I/O7)IOL = 4mA

___

0.4

___

0.4

VOL

Open Drain Output

Low Voltage (BUSY/INT)

IOL = 16mA

___

0.5

___

0.5

VOH

Output High Voltage

IOH = -4mA

2.4

___

2.4

___

2691 tbl 05

Symbol

Parameter

Test Condition

Min.

Typ.(1)

Max.

Unit

VDR

VCC for Data Retention

2.0

____

ICCDR

Data Retention Current

VCC = 2.0V, CE > VCC - 0.2V

COM'L

____

100

1500

µA

VIN > VCC - 0.2V or VIN < 0.2V

IND

____

100

4000

µA

tCDR(3)

Chip Deselect to Data Retention Time

____

tR(3)

Operation Recovery Time

tRC(2)

____

2691 tbl 06

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