ML9092-01TB datasheet(13/66 Pages) OKI

13 / 66 page

FEDL9092-01

OKI Semiconductor

ML9092-01/02/03/04

13/66

ML9092-03

Function

Symbol

Type

Description

Chip select signal input pin

Shift clock signal input pin. This pin is

connected to the Schmitt circuit internally.

DI/O

I/O

Serial data signal I/O pin. This pin is

connected to the Schmitt circuit internally.

CPU interface

KREQ

Key scan read and rotary encoder read

READY signal output pin.

OSC1

Oscillation

OSC2

Connect external resistors with this pin.

This pin is connected to the Schmitt circuit

internally.

If using an external clock, input it from the

OSC1 pin and leave the OSC2 pin open.

RESET

Reset input. Initial settings can be

established by applying a “L” level to this

pin. This pin is connected to the Schmitt

circuit internally.

Control signal

TEST

Test input pin. This pin is connected to the

VSS pin.

62–59

C0–C3

Input pins that detect status of key

switches. These pins are connected to the

Schmitt circuit internally.

58–53

R0–R5

Key switch scan signal output pins

Switch signal

51, 52

A, B

Rotary encoder signal input pins.

These pins are connected to the Schmitt

circuit internally.

Port output

PA0

Port A output pin

50–1,

100–91

SEG1–SEG60

LCD segment driver output pins

LCD driver output

90–81

COM1–COM10

LCD common driver output pins

VDD

—

Logic power supply pin

VSS

—

GND pin

VHIN

—

High-voltage power supply pin

73, 72, 70, 69

V0, V1, V2, V3

—

LCD bias pins

Power supply

75, 71

—

Should be left open.

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