TS321

Preliminary

LINEAR INTEGRATED CIRCUIT

UNISONIC TECHNOLOGIES CO., LTD

5 of 6

www.unisonic.com.tw



ELECT RI CAL CH ARACT ERI ST I CS

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input Offset Voltage

0.5

4

mV

Input Offset Current

2

30

nA

Input Bias Current (Note 1)

20

150

nA

Large-Signal Differential

Voltage Amplification

Ω,

50

100

V/mV

Common-Mode Input

Voltage (Note 2)

0

V

Ω

26

27

Ω

27

28

High-Level Output Voltage

Ω

3.5

V

Low-Level Output Voltage

Ω

5

15

mV

Gain Bandwidth Product

GBP

Ω,

0.8

MHz

Slew Rate

SR

Ω,

0.4

V/µs

Phase Margin

60

°

Common-Mode Rejection

Ratio

CMRR

≤10kΩ

65

85

dB

Output Source Current

20

40

mA

10

20

mA

Output Sink Current

12

50

µA

Short-Circuit To GND

40

60

mA

Supply-Voltage Rejection

Ratio

SVR

65

110

dB

500

800

µA

Total Supply Current

No load

600

900

µA

Total Harmonic Distortion

THD

0.015

%

Equivalent Input Noise

Voltage

Ω

50

nV/ Hz

Notes: 1. The direction of the input current is out of the device. This current essentially is constant, independent of

the state of the output, so no loading change exists on the input lines.

2. The input common-mode voltage of either input signal should not be allowed to go negative by more than

32V without damage.