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MPC962309DT-1HR2 数据表(PDF) 4 Page - Motorola, Inc

部件名 MPC962309DT-1HR2
功能描述  Low-Cost 3.3 V Zero Delay Buffer
PDF  12 Pages
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制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc

MPC962309DT-1HR2 数据表(HTML) 4 Page - Motorola, Inc

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MPC962305 MPC962309
TIMING SOLUTIONS
4
MOTOROLA
Table 7. Switching Characteristics for MPC962305-1 and MPC962309-1 Industrial Temperature Devices1
1. All parameters are specified with loaded outputs.
Parameter
Name
Test Conditions
Min
Typ
Max
Unit
t1
Output Frequency
30-pF load
10-pF load
10
10
100
133.33
MHz
MHz
Duty Cycle2 = t2 ÷ t1
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Measured at 1.4 V, FOUT = 66.67 MHz
40.0
50.0
60.0
%
t3
Rise Time2
Measured between 0.8 V and 2.0 V
2.50
ns
t4
Fall Time2
Measured between 0.8 V and 2.0 V
2.50
ns
t5
Output to Output Skew2
All outputs equally loaded
250
ps
t6A
Delay, REF Rising Edge to
CLKOUT Rising Edge2
Measured at VDD/2
0
±350
ps
t6B
Delay, REF Rising Edge to
CLKOUT Rising Edge2
Measured at VDD/2. Measured in PLL Bypass Mode,
MPC962309 device only
15
8.7
ns
t7
Device to Device Skew2
Measured at VDD/2 on the CLKOUT pins of devices
0700
ps
tJ
Cycle to Cycle Jitter2
Measured at 66.67 MHz, loaded outputs
200
ps
tLOCK
PLL Lock Time2
Stable power supply, valid clock presented on REF pin
1.0
ms
Table 8. Switching Characteristics for MPC962305-1H and MPC962309-1H Industrial Temperature Devices1
1. All parameters are specified with loaded outputs.
Parameter
Name
Test Conditions
Min
Typ
Max
Unit
t1
Output Frequency
30-pF load
10-pF load
10
10
100
133.33
MHz
MHz
Duty Cycle2 = t2
÷ t1
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Measured at 1.4 V, FOUT = 66.67 MHz
40.0
50.0
60.0
%
Duty Cycle2 = t2
÷ t1
Measured at 1.4 V, FOUT < 50 MHz
45.0
55.0
55.0
%
t3
Rise Time2
Measured between 0.8 V and 2.0 V
1.50
ns
t4
Fall Time2
Measured between 0.8 V and 2.0 V
1.50
ns
t5
Output to Output Skew2
All outputs equally loaded
250
ps
t6A
Delay, REF Rising Edge to
CLKOUT Rising Edge2
Measured at VDD/2
0
±350
ps
t6B
Delay, REF Rising Edge to
CLKOUT Rising Edge2
Measured at VDD/2. Measured in PLL Bypass Mode,
MPC962309 device only
15
8.7
ns
t7
Device to Device Skew2
Measured at VDD/2 on the CLKOUT pins of devices
0700
ps
t8
Output Slew Rate2
Measured between 0.8 V and 2.0 V using Test Circuit #2
1V/ns
tJ
Cycle to Cycle Jitter2
Measured at 66.67 MHz, loaded outputs
200
ps
tLOCK
PLL Lock Time2
Stable power supply, valid clock presented on REF pin
1.0
ms
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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