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AHV2805DF/ES 数据表(PDF) 5 Page - International Rectifier |
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AHV2805DF/ES 数据表(HTML) 5 Page - International Rectifier |
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5 / 9 page ![]() www.irf.com 5 AHV28XX Series Notes to Specifications (Triple Output Models) Specifications (Triple Output Models) - continued 1. Tested at each output. 2. Parameter guaranteed by line and load regulation tests. 3. At least 25 percent of the total power should be taken from the (+5 volt) main output. 4. Bandwidth guaranteed by design. Tested for 20KHz to 2MHz. 5. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on. 7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified. 8. Above 125 °C case temperature, derate output power linearly to 0 at 135°C case. 9. Load step transition time between 2 and 10 microseconds. 10. Recovery time is measured from the initiation of the transient to where V OUT has returned to within ±1 percent of VOUT at 50 percent load. 11. Input step transition time between 2 and 10 microseconds. 12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 8) while power is applied to the input. Notes to Specifications (Dual Output Models) 1. Tested at each output. 2. Parameter guaranteed by line and load regulation tests. 3. Bandwidth guaranteed by design. Tested for 20KHz to 2MHz. 4. Total power at both outputs. 5. When operating with unbalanced loads, at least 25% of the load must be on the positive output to maintain regulation. 6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on. 7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified. 8. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 9. Load step transition time between 2 and 10 microseconds. 10. Recovery time is measured from the initiation of the transient to where V OUT has returned to within ±1 percent of VOUT at 50 percent load. 11. Input step transition time between 2 and 10 microseconds. 12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the input. 13. Above 125 °C case temperature, derate output power linearly to 0 at 135°C. AHV2812T AHV2815T TEST SYMBOL Condition -55 °C ≤ T C ≤ +125 °C, V IN = 28 V DC ± 5%, C L =0, unless otherwise specified Group A Subgroups Min Max Min Max Units DYNAMIC CHARACTERISTICS Step Load Changes Output Transient 9 Recovery 9,10 VOT LOAD TT LOAD 50% Load 135 100% Load No Load 135 50% 50% Load 135 100% No Load 335 50% Load 50% Load 335 No lLoad 4 4 4 4 4 -300 -400 +300 +400 100 2000 5 -300 -400 +300 +400 100 2000 5 mVpk mVpk µS µS ms Step Line Changes Output Transient Recovery 7,10, 11 VOT LINE TT LINE Input step 16 to 40 VDC Input step 40 to 16 VDC Input step 16 to 40 VDC Input step 40 to 16 VDC 4 4 4 4 1200 -1500 4 4 1200 -1500 4 4 mVpk mVpk µs µs TURN-ON Overshoot 1 Delay 1,12 VTon OS T on D I OUT = O and ±625mA I OUT = O and ±625mA 4 4 750 15 750 15 mVpk ms Load Fault Recovery 7 TR LF 4 15 15 ms |
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