UT3243A

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

3 of 10

www.unisonic.com.tw

QW-R502-B62.D



PIN CONFIGURATION

1

C2+

2

C2-

3

V-

4

5

6

7

8

9

10

11

12

13

14

28 C1+

27 V+

25 GND

24 C1-

23 FORCEON

22 FORCEOFF

21 INVALID

UTC

UT3243A

QFN-32(5×5)

Top View

SSOP-28 / TSSOP-28

GND

C1-

FORCEON

FORCEOFF

INVALID

24

23

22

21

20

19

18

17

1

2

3

4

5

6

7

8

9 10 111213 14 1516

31 30 29 28 27 26 25

32



PIN DESCRIPTION

PIN NO.

SSOP-28

TSSOP-28

QFN-32(5×5)

PIN NAME

DESCRIPTION

1

29

C2+

Positive terminal of inverting charge-pump capacitor

2

30

C2-

Negative terminal of inverting charge-pump capacitor

3

31

V-

-5.5V generated by the charge pump

4~8

1~5

RS-232 Receiver Inputs

9~11

6~8

RS-232 Transmitter Outputs

12~14

10~12

TTL/CMOS Transmitter Inputs

15~19

13~15, 7~18

TTL/CMOS Receiver Outputs

20

17

Noninverting Receiver Output—active in shutdown

21

20

INVALID

Output of the valid signal detector. Indicates if a valid RS-232

level is present on receiver inputs logic “1”.

22

21

FORCEOFF

Drive low to shut down transmitters and on-board power supply.

This over-rides all automatic circuitry and FORCEON (Table 1).

23

22

FORCEON

Drive high to override automatic circuitry keeping transmitters on

24

23

C1-

Negative terminal of the voltage doubler charge-pump capacitor

25

24

GND

Ground

26

26

+3.0V ~ +5.5V Supply Voltage

27

27

V+

+5.5V generated by the charge pump

28

28

C1+

Positive terminal of the voltage doubler charge-pump capacitor

-

9, 16, 25, 32

NC

No Connect