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PLMT01HTA/EM 数据表(PDF) 15 Page - Texas Instruments |
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PLMT01HTA/EM 数据表(HTML) 15 Page - Texas Instruments |
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15 / 23 page ![]() MSP430 VR IR = 34 and 125 µA VDD 3.3V R 6.81k 1% GPIO 2.73V or 2.24V LMT01-SP VP VN VREF + COMP_B Divider TIMER2 CLOCK 0.00 0.01 0.02 0.03 0.04 0.05 0.06 0 10 20 30 40 50 60 -100 -50 0 50 100 150 200 Temperature ( ƒC) Average Current Self Heating at VP-VN=5V Self Heating at VP-VN=2.15V C001 15 LMT01-SP www.ti.com SNIS205 – JANUARY 2019 Product Folder Links: LMT01-SP Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Application Information (continued) Figure 24. Average Current Draw and Self-Heating Over Temperature 8.2 Typical Application 8.2.1 3.3-V System VDD MSP430 Interface - Using Comparator Input Figure 25. MSP430 Comparator Input Implementation 8.2.1.1 Design Requirements The design requirements listed in Table 2 are used in the detailed design procedure. Table 2. Design Parameters DESIGN PARAMETER EXAMPLE VALUE VDD 3.3 V VDD minimum 3 V LMT01-SP VP – VN minimum during conversion 2.15 V LMT01-SP VP – VN minimum during data transmission 2 V Noise margin 50-mV minimum Comparator input current over temperature range of interest < 1 uA Resistor tolerance 1% |
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