P-Channel Logic Level Enhancement

Mode Field Effect Transistor

PA102FDG

TO-252

Lead-Free

NIKO-SEM

2

NOV-05-2004

DYNAMIC

Input Capacitance

430

Output Capacitance

235

Reverse Transfer Capacitance

95

pF

Total Gate Charge

2

7.6

10

Gate-Source Charge

2

3.2

Gate-Drain Charge

2

2

nC

Turn-On Delay Time

2

25

Rise Time

2

60

Turn-Off Delay Time

2

70

Fall Time

2

60

nS

Continuous Current

-10

Pulsed Current

3

-24

A

Forward Voltage

1

-1.2

V

≤ 300 µsec, Duty Cycle ≤ 2％.

REMARK: THE PRODUCT MARKED WITH PA102FDG, DATE CODE or LOT #

Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.