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TMUX1102DBVR 数据表(PDF) 22 Page - Texas Instruments |
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TMUX1102DBVR 数据表(HTML) 22 Page - Texas Instruments |
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22 / 31 page ![]() Via to GND plane C Wide (low inductance) trace for power TMUX110x 22 TMUX1101, TMUX1102 SCDS410 – MARCH 2019 www.ti.com Product Folder Links: TMUX1101 TMUX1102 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Layout Guidelines (continued) Figure 12 illustrates an example of a PCB layout with the TMUX110x. Some key considerations are: • Decouple the VDD pin with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the capacitor voltage rating is sufficient for the VDD supply. • Keep the input lines as short as possible. • Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup. • Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when necessary. 12.2 Layout Example Figure 12. TMUX110x Layout example |
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