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ES7210 数据表(PDF) 2 Page - Suzhou Everest Semiconductor Co. Ltd. |
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ES7210 数据表(HTML) 2 Page - Suzhou Everest Semiconductor Co. Ltd. |
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2 / 11 page ![]() Everest Semiconductor Confidential ES7210 Revision 11.1 2 March 2019 Latest datasheet: www.everest-semi.com or info@everest-semi.com 1. PIN OUT AND DESCRIPTION Pin Name Pin number Input or Output Pin Description CDATA, CCLK 3, 4 I/O I2C clock and data AD0, AD1 1, 2 I I2C address MCLK 5 I Master clock SCLK 9 I/O Serial data bit clock LRCK 10 I/O Serial data left and right channel frame clock SDOUT1/TDMOUT SDOUT2/TDMIN 11 12 O I/O Serial data output or TDM data input and output INT 13 O Interrupt DMIC_CLK 14 O Digital mic clock MIC1P, MIC1N MIC2P, MIC2N MIC3P, MIC3N MIC4P, MIC4N 16, 15 19, 20 31, 32 28, 27 Analog Mic input MICBIAS12 MICBIAS34 24 26 Analog Mic bias VDDP 6 Analog Power supply for the digital input and output VDDD, GNDD 7, 8 Analog Digital power supply VDDA, GNDA 22, 21 Analog Analog power supply VDDM 23 Analog Analog power supply REFP12, REFP34 17, 29 Analog Filtering capacitor connection REFQ12, REFQ34 18, 30 Analog Filtering capacitor connection REFQM 25 Analog Filtering capacitor connection ES7210 AD0 AD1 CDATA CCLK MCLK VDDP VDDD GNDD 1 2 3 4 5 6 7 8 MICBIAS12 VDDM VDDA GNDA MIC2N MIC2P REFQ12 REFP12 24 23 22 21 20 19 18 17 |
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