¡ Semiconductor

MSM7578H/7578V/7579

5/18

Power supply for +5 V.

PCMIN

PCM signal input.

A serial PCM signal input to this pin is converted to an analog signal in synchronization with the

RSYNC signal and BCLK signal.

The data rate of the PCM signal is equal to the frequency of the BCLK signal.

The PCM signal is shifted at a falling edge of the BCLK signal and latched into the internal register

when shifted by eight bits.

The start of the PCM data (MSD) is identified at the rising edge of RSYNC.

BCLK

Shift clock signal input for the PCMIN and PCMOUT signal.

The frequency, equal to the data rate, is 64, 96, 128, 192, 256, 384, 512, 768, 1024, 1536, 1544, 2048,

or 200 kHz. Setting this signal to logic “1” or “0” drives both transmit and receive circuits to the

power saving state.

RSYNC

Receive synchronizing signal input.

Eight required bits are selected from serial PCM signals on the PCMIN pin by the receive

synchronizing signal.

Signals in the receive section are synchronized by this synchronizing signal. This signal must be

synchronized in phase with the BCLK. The frequency should be 8 kHz

±50 ppm to guarantee the

AC characteristics which are mainly the frequency characteristics of the receive section.

However, if the frequency characteristic of an applied system is not specified exactly, this device

can operate in the range of 8 kHz

±2 kHz, but the electrical characteristics in this specification are

not guaranteed.

XSYNC

Transmit synchronizing signal input.

The PCM output signal from the PCMOUT pin is output in synchronization with this transmit

synchronizing signal. This synchronizing signal triggers the PLL and synchronizes all timing

signals of the transmit section.

This synchronizing signal must be synchronized in phase with BCLK.

The frequency should be 8 kHz

±50 ppm to guarantee the AC characteristics which are mainly

the frequency characteristics of the transmit section.

However, if the frequency characteristic of an applied system is not specified exactly, this device

can operate in the range of 8 kHz

±2 kHz, but the electrical characteristics in this specification are

not guaranteed.

Setting this signal to logic “1” or “0” drives both transmit and receive circuits to the power saving

state.