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N32001U7DN 数据表(PDF) 14 Page - Nuvoton Technology Corporation |
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N32001U7DN 数据表(HTML) 14 Page - Nuvoton Technology Corporation |
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14 / 34 page ![]() N3291xUxDN Data Sheet - 14 - Nuvoton Technology Corp. Release Date: Jun. 2013 http://www.nuvoton.com/ Revision A3 PIN NAME I/O TYPE DESCRIPTION LVD_OUT Low Voltage Dection Indicator S2VSYNC The 2 nd CMOS Camera Module VSYNC Signal UHL_DP0 USB 1.1 Host Like Port 0 D+ Signal GPD[3] GPIO Port D Bit 3 TRST_ IOU JTAG Interface Test Reset, Input, Low Active HUR_RTS High-Speed UART Reset-To-Send, Output, Low Active SPI0_CS1_ SPI Port 0 Device Select 1, Output, Low Active UHL_DM0 USB 1.1 Host like Port 0 D- Signal S2HSYNC The 2 nd CMOS Camera Module HSYNC Signal GPD[4] GPIO Port D Bit 4 NAND Interface NCS0_ IOU NAND Interface Chip Select 0, Output, Low Active GPE[8] GPIO Port E Bit 8 NCS1_ IOU NAND Interface Chip Select 1, Output, Low Active GPE[9] GPIO Port E Bit 9 NALE IOU NAND Interface Address-Latch-Enable, Output, High Active SDDAT2[0] SD Port 2 Data Bit 0 GPE[10] GPIO Port E Bit 10 NCLE IOU NAND Interface Command-Latch-Enable, Output, High Active SDDAT2[1] SD Port 2 Data Bit 1 GPE[11] GPIO Port E Bit 11 NBUSY0_ IOU NAND Interface Busy 0, Input, Low Active SDDAT2[2] SD Port 2 Data Bit 2 GPD[5] GPIO Port D Bit 5 NBUSY1_ IOU NAND Interface Busy 1, Input, Low Active GPD[6] GPIO Port D Bit 6 NRE_ IOU NAND Interface Read Enable, Output, Low Active SDCLK2 SD Port 2 Clock, Output |
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