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MSM82C53-2JS 数据表(PDF) 8 Page - OKI electronic componets |
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MSM82C53-2JS 数据表(HTML) 8 Page - OKI electronic componets |
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8 / 19 page ![]() 8/19 ¡ Semiconductor MSM82C53-2RS/GS/JS DESCRIPTION OF BASIC OPERATIONS Data transfers between the internal registers and the external data bus is outlined in the following table. 0 0 0 0 0 CS Function 0 0 0 1 0 1 1 1 0 1 RD 0 0 0 ¥ 1 0 0 0 1 0 WR 1 1 1 ¥ 1 0 1 1 0 0 A1 0 1 1 ¥ ¥ 1 0 1 0 0 A0 1 0 1 ¥ ¥ Data Bus to Counter #0 Writing Data Bus to Counter #1 Writing Data Bus to Counter #2 Writing Data Bus to Control Word Register Writing Data Bus from Counter #0 Reading Data Bus from Counter #1 Reading Data Bus from Counter #2 Reading Data Bus High Impedance Status ¥ denotes "not specified". DESCRIPTION OF OPERATION MSM82C53-2 functions are selected by a control word from the CPU. In the required program sequence, the control word setting is followed by the count value setting and execution of the desired timer operation. Control Word and Count Value Program Each counter operation mode is set by control word programming. The control word format is out-lined below. SC1 D7 SC0 D6 RL1 D5 RL0 D4 M2 D3 M1 D2 M0 D1 BCD D0 Select Counter Read/Load Mode BCD (CS=0, A0, A1=1, 1, RD=1, WR=0) |
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