DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
Preliminary
27
Version: DM562P-DS-P02
February 28, 2001
Bit
Default
Type
Description
31:27
00000
RO
_WR
PME_Support
This five-bit field indicates the power states in which the function may assert
PME#. A value of 0 for any bit indicates that the function is not capable of
asserting thePME# signal while in that power state.
bit27
PME# support D0
bit28
PME# support D1
bit29
PME# support D2
bit30
PME# support D3(hot)
bit31
PME# support D3(cold)
DM6588’s bit31~27=11000 indicates PME# can be asserted from D3(hot) &
D(cold).
26:22
00000
RO
Reserved (DM6588 not supports D1, D2)
21
0
RO
A “1” indicates that the function requires a device specific initialization
sequence following transition to the D0 uninitialized state.
20
1
RO
Auxiliary Power Source
This bit is only meaningful if bit31 is a “1”.
This bit is “1” in DM6588 indicates that support for PME# in D3(cold)
requires auxiliary power.
19
0
RO
PME# Clock
“0” indicates that no PCI clock is required for the function to generate
PME#.
18:16
001
RO
Version
A value of 001 indicates that this function complies with the Revision 1.0 of
the PCI Power Management Interface Specification.
15:8
00h
RO
Next Item Pointer
The offset into the function’s PCI Configuration Space pointing to the
location of next item in the function’s capability list is “00h”
7:0
01h
RO
Capability Identifier
When “01h” indicates the linked list item as being the PCI Power
Management Registers.
Power Management Control/Status(Xxxxxx54h~PMCSR)
0
R/W
R/W
R/W
0
0
0
0
0
0
0
000
0
0
1
2
15
8
7
9
14
PMCSR
Offset=54H
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