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MPC866P 数据表(PDF) 7 Page - Freescale Semiconductor, Inc |
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MPC866P 数据表(HTML) 7 Page - Freescale Semiconductor, Inc |
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7 / 92 page ![]() MOTOROLA MPC866/859 Hardware Specifications 7 Maximum Tolerated Ratings Figure 2. MPC859P/859T/MPC859DSL Block Diagram 3 Maximum Tolerated Ratings This section provides the maximum tolerated voltage and temperature ranges for the MPC866/859. Table 2 shows the maximum tolerated ratings, and Table 3 shows the operating temperatures. Table 2. Maximum Tolerated Ratings Rating Symbol Value Unit Supply voltage 1 VDDH – 0.3 to 4.0 V VDDL – 0.3 to 2.0 V VDDSYN – 0.3 to 2.0 V Difference between VDDL to VDDSYN 100 mV Bus System Interface Unit (SIU) Embedded Parallel I/O Memory Controller 4 Timers Interrupt Controllers 8-Kbyte Dual-Port RAM 10 Virtual Serial and 2 Independent DMA Channels System Functions PCMCIA/ATA Interface 4-Kbyte † Instruction Cache 32-Entry ITLB Instruction MMU 4-Kbyte † Data Cache 32-Entry DTLB Data MMU Instruction Bus Load/Store Bus Unified 4 Baud Rate Generators Parallel Interface Port and UTOPIA Internal Bus Interface Unit External Bus Interface Unit Timers 32-Bit RISC Controller and Program ROM SCC1 Serial Interface I2C SPI SMC2* SMC1 Time Slot Assigner MPC8xx Processor Core DMAs FIFOs 10/100 MII Base-T Media Access Time Slot Assigner* Control Fast Ethernet Controller * The MPC859DSL does not contain SMC2 nor the time slot assigner, and provides eight SDMA controllers. † The MPC859P has a 16-Kbyte instruction cache and a 8-Kbyte data cache. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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