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MS2LFS 数据表(PDF) 4 Page - Mixed Signal Integration |
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MS2LFS 数据表(HTML) 4 Page - Mixed Signal Integration |
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4 / 5 page ![]() Dual Selectable Low Voltage Lowpass/Bandpass Filter Data Sheet 09/2014 Block Diagram Digital Levels All the clock and control pins are referenced between VSS and VDD. In single supply appli- cations, the digital levels should be CMOS lev- els from VSS to VDD. The tertiary controls (pins - TYPE and GAIN) should be set at VSS, VREF or VDD depending on the filter type or gain de- Ordering Information__________ Part Number Package MS2LFSP 28 Pin DIP MS2LFSS 28 Pin 300 mils wide SOIC Absolute Maximum Ratings Power Supply Voltage +5V Storage Temperature -60 to +150 C Operating Temperature 0 to 70C Web Site “www.mix-sig.com” © 2000-2014 Mixed Signal Integration 4 Mixed Signal Integration Corporation reserves the right to to change any product or specification without notice at any time. Mixed Signal Integration products are not designed or authorized for use in life support systems. Mixed Signal Integration assumes no responsibility for errors in this docu- ment. Gain and Frequency Selection____ The Gain control pin G is a tertiary control pin where state 0 is VSS, state 1 is GND level and state 2 is VDD. G Gain 0 OdB 1 6dB 2 12dB The frequency control pin F0 is a CMOS level pin where high is clock to corner of 85.3 to 1 (170.6 to 1 for Bessel) and low is clock to corner of 42.65 to 1 (85.3 to 1 for Bessel). FSEL=0 FSEL=1 TYPE Lowpass Bandpass 0 Butterworth Full Octave 1 Bessel Third Octave 2 Elliptic Sixth Octave The filter type is selected using the two filter select pins, TYPE and FSEL, FSEL is a CMOS level pin that selects lowpass or bandpass (lowpass = 0, bandpass = 1). TYPE Is a tertiary control pin that selects the filter response. State 0 is VSS, state 1 is GND and state 2 is VDD. Filter Selection________________ FSEL A TYPE A GAIN A MIC OUT MIC IN SCF Out A MIC Section VREF One PD MIC Clock PD A PD B Fo CTVL PWR Out B SCF IN B PD Out B Section Out B Three FSEL B TYPE B Adjustable Gain SCF Section Two SCF Section Three SCF Lowpass Buffer SCF Section Two SCF Section One SCF Lowpass Buffer Clock Divider Low Voltage Circuitry |
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