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MSLEBC5LM 数据表(PDF) 3 Page - Mixed Signal Integration |
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MSLEBC5LM 数据表(HTML) 3 Page - Mixed Signal Integration |
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3 / 5 page ![]() Switched Capacitor General Purpose Lowpass Filter Data Sheet 5/2015 Pin Description Pin Configuration 1 CLK Clock Input 2 R Connection for the Clock Resistor (NC when using external clock) 3 FO Clock to Corner Select Pin, CMOS level ( NC is FO = HIGH) 4 VSS Negative Power Supply, Typically -2.5V for Split Supplies, 0V for Single Supply 5 GND Ground Pin 0V for Split Supplies Typically 2.5V for Single Supply 6 FOUT Filter Output 7 VDD Positive Power Supply, Typically 2.5V for Split Supplies, 5V for Single Supply 8 FIN Filter Input Web Site “www.mix-sig.com” © 2015 Mixed Signal Integration 3 1 2 3 4 8 7 6 5 FIN VDD GND CLK R FO VSS FOUT |
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