GD5F2GQ4RFZFS datasheet(4/57 Pages) GIGADEVICE

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SPI(x1/x2/x4) NAND Flash

FEATURE

◆

2Gb SLC NAND Flash

◆

Program/Erase/Read Speed

- Page Program time: 400us typical

◆

2048-Byte+128-Byte Physical Page Size(2)

- Block Erase time: 3ms typical

- Internal ECC Off (ECC_EN=0):

- Page read time: 80us maximum(w/I ECC)

2048-Byte+128-Byte Full Access

- Internal ECC On (ECC_EN=1, default):

◆ Reliability

Program:

2048-Byte+64-Byte

- Endurance: 100K program/erase cycles

Read:

2048-Byte+128-Byte

- Data retention: 10 Years

◆

Standard, Dual, Quad SPI

◆

Low Power Consumption

- Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#

- 40mA maximum active current

- Dual SPI: SCLK, CS#, SIO0, SIO1, WP#, HOLD#

-110uA(1) maximum standby current

- Quad SPI: SCLK, CS#, SIO0, SIO1, SIO2, SIO3

◆

Enhanced access performance

◆

High Speed Clock Frequency

- 2kbyte cache for fast random read

- 120MHz for fast read with 30PF load

- Cache read and cache program

- Quad I/O Data transfer up to 480Mbits/s

◆

Advanced Feature for NAND

◆

Software/Hardware Write Protection

- Internal ECC option, per 528bytes

- Write protect all/portion of memory via software

- Internal data move by page with ECC

- Register protection with WP# Pin

- Top or Bottom, Block selection combination

◆

The first block(Block0) is guaranteed to be a valid block

at the time of shipment.

◆

Advanced security Features

- 8K-Byte OTP Region (4 page OTP)

◆

Single Power Supply Voltage

- Full voltage range for 1.8V: 1.7V ~ 2.0V

- Full voltage range for 3.3V: 2.7V ~ 3.6V

Note (1): When Temperature is 105

℃, the maximum standby current is 200uA

(2)

. 2048Byte+128Byte Page Size can accommodate more advanced ECC algorithm by user’s choice, even though

the internal 4-bit ECC algorithm only requires 64-Byte spare area.

Internal 4-bit ECC is set to on (ECC_EN=1) as shipment default, it can be disabled by setting ECC_EN=0.

- When Internal ECC is enabled, user can only program the first 64-Byte portion of the entire 128-Byte spare

area, and the rest 64-Byte spare area cannot be programed. User can still read the entire 128-Byte spare area.

- When Internal ECC is disabled, user can read and program the entire 128-Byte spare area.

GD5F2GQ4RFZFS 数据表(PDF) 4 Page - GigaDevice Semiconductor (Beijing) Inc.

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