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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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GD25LQ64CSIS 数据表(PDF) 59 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LQ64CSIS 数据表(HTML) 59 Page - GigaDevice Semiconductor (Beijing) Inc. |
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59 / 77 page  1.8V Uniform Sector Dual and Quad Serial Flash GD25LQ64C 59 Figure42. Input Test Waveform and Measurement Level 8.4 CAPACITANCE MEASUREMENT CONDITIONS Symbol Parameter Min Typ. Max Unit Conditions CIN Input Capacitance 6 pF VIN=0V COUT Output Capacitance 8 pF VOUT=0V CL Load Capacitance 30 pF Input Rise And Fall time 5 ns Input Pause Voltage 0.1VCC to 0.8VCC V Input Timing Reference Voltage 0.2VCC to 0.7VCC V Output Timing Reference Voltage 0.5VCC V Figure43. Input Test Waveform and Measurement Level 0.8VCC 0.1VCC 0.7VCC 0.2VCC 0.5VCC AC Measurement Level Input timing reference level Output timing reference level Note: Input pulse rise and fall time are<5ns Vss 20ns Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform 20ns 20ns Vss-2.0V Vcc 20ns 20ns 20ns Vcc + 2.0V |
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