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M95640 数据表(PDF) 21 Page - STMicroelectronics |
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M95640 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 42 page  21/42 M95640, M95320 POWER-UP AND DELIVERY STATE Power-up State After Power-up, the device is in the following state: – Standby Power mode – deselected (after Power-up, a falling edge is required on Chip Select (S) before any instructions can be started). – not in the Hold Condition – the Write Enable Latch (WEL) is reset to 0 – Write In Progress (WIP) is reset to 0 The SRWD, BP1 and BP0 bits of the Status Reg- ister are unchanged from the previous power- down (they are non-volatile bits). INITIAL DELIVERY STATE The device is delivered with the memory array set at all 1s (FFh). The Status Register Write Disable (SRWD) and Block Protect (BP1 and BP0) bits are initialized to 0. |
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