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M95640-RBN3 数据表(PDF) 11 Page - STMicroelectronics |
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M95640-RBN3 数据表(HTML) 11 Page - STMicroelectronics |
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11 / 42 page ![]() 11/42 M95640, M95320 – The ‘last bit of the instruction’ can be the eighth bit of the instruction code, or the eighth bit of a data byte, depending on the instruction (except for Read Status Register (RDSR) and Read (READ) instructions). – The ‘next rising edge of Serial Clock (C)’ might (or might not) be the next bus transaction for some other device on the SPI bus. Table 5. Write-Protected Block Size Status Register Bits Protected Block Array Addresses Protected BP1 BP0 M95640, M95640-W, M95640-R, M95640-S M95320, M95320-W, M95320-R, M95320-S 0 0 none none none 0 1 Upper quarter 1800h - 1FFFh 0C00h - 0FFFh 1 0 Upper half 1000h - 1FFFh 0800h - 0FFFh 1 1 Whole memory 0000h - 1FFFh 0000h - 0FFFh |
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