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TUSB8044AI 数据表(PDF) 4 Page - Texas Instruments |
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TUSB8044AI 数据表(HTML) 4 Page - Texas Instruments |
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4 / 69 page  1 USB_DP_DN1 48 USB_VBUS 2 USB_DM_DN1 47 OVERCUR2z 3 USB_SSTXP_DN1 46 OVERCUR1z 4 USB_SSTXM_DN1 45 BBbmConfigured1/AUTOENz/ HS_SUSPEND 5 VDD 44 OVERCUR3z 6 USB_SSRXP_DN1 43 OVERCUR4z 7 USB_SSRXM_DN1 42 BBEN/GANGED,HS_UP 8 VDD 41 PWRCTL_POL 9 USB_DP_DN2 40 BBbmConfigured0/FULLAUTOz/ FULLPWRMGMTz/SS_UP 10 USB_DM_DN2 39 SMBUSz,SS_SUSPEND 11 USB_SSTXP_DN2 38 SCL/SMBCLK 12 USB_SSTXM_DN2 37 SDA/SMBDAT 13 VDD 36 PWRCTL1/BATEN1 14 USB_SSRXP_DN2 35 PWRCTL2/BATEN2 15 USB_SSRXM_DN2 34 VDD33 16 VDD33 33 PWRCTL3/BATEN3 Not to scale Thermal Pad 4 TUSB8044A SLLSF92A – FEBRUARY 2019 – REVISED MARCH 2019 www.ti.com Product Folder Links: TUSB8044A Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 6 Pin Configuration and Functions RGC Package 64 Pin (VQFN) (Top View) Pin Functions PIN I/O DESCRIPTION NAME NO. Clock and Reset Signals GRSTz 50 I, PU Global power reset. This reset brings all of the TUSB8044A internal registers to their default states. When GRSTz is asserted, the device is completely nonfunctional. XI 62 I Crystal input. This pin is the crystal input for the internal oscillator. The input may alternately be driven by the output of an external oscillator. When using a crystal a 1-M Ω feedback resistor is required between XI and XO. XO 61 O Crystal output. This pin is the crystal output for the internal oscillator. If XI is driven by an external oscillator this pin may be left unconnected. When using a crystal a 1-M Ω feedback resistor is required between XI and XO. USB Upstream Signals USB_SSTXP_UP 55 O USB SuperSpeed transmitter differential pair (positive) USB_SSTXM_UP 56 O USB SuperSpeed transmitter differential pair (negative) USB_SSRXP_UP 58 I USB SuperSpeed receiver differential pair (positive) |
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