S-817B13AUA-CWC-T2 datasheet(18/50 Pages) SII

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SUPER-SMALL PACKAGE CMOS VOLTAGE REGULATOR

S-817 Series

Rev.3.0_00

Seiko Instruments Inc.

3. Output Voltage Adjustment Circuit (Only for S817B Series (Product without short circuit protection))

GND

VOUT

VIN

CIN

VSS

S-817

Series

Figure 17

The output voltage can be boosted by using the configuration shown in Figure 17. The output Voltage

(VO) can be calculated using the following equation (VOUT(E):Effective output voltage):

= VOUT(E) × (R1 + R2) ÷ R1 + R2 × ISS

Set R1 and R2 to high values of resistance so as not to be affected by current consumption (ISS).

Capacitor C1 is effective in minimizing output fluctuation at powering on or due to power or load

fluctuation. Determine the optimum value on your actual device. But it is not also recommended to

attach a capacitor between the S-817 Series power source VIN and VSS pin or between output VOUT

and VSS pin because output fluctuation or oscillation at powering on might occur. As shown in Figure

17, a capacitor must be mounted between VIN and GND, and between VOUT and GND.

Precautions

• Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low.

When mounting an output capacitor between the VOUT and VSS pins (CL) and a capacitor for stabilizing

the input between VIN and VSS pins (CIN), the distance from the capacitors to these pins should be as

short as possible.

• Note that the output voltage may increase when a series regulator is used at low load current (1.0 µA or

less).

• Generally a series regulator may cause oscillation, depending on the selection of external parts. The

following conditions are recommended for this IC. However, be sure to perform sufficient evaluation

under the actual usage conditions for selection, including evaluation of temperature characteristics.

Output capacitor (CL) :

0.1

µF or more

Equivalent Series Resistance (ESR) :

Ω or less

Input series resistance (RIN) :

Ω or less

• The voltage regulator may oscillate when the impedance of the power supply is high and the input

capacitor is small or an input capacitor is not connected.

• The application conditions for the input voltage, output voltage, and load current should not exceed the

package power dissipation.

• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in

electrostatic protection circuit.

• SII claims no responsibility for any disputes arising out of or in connection with any infringement by

products including this IC of patents owned by a third party.

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