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ADM3065EARMZ-R7 数据表(PDF) 4 Page - Analog Devices |
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ADM3065EARMZ-R7 数据表(HTML) 4 Page - Analog Devices |
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4 / 28 page ![]() ADM3061E/ADM3062E/ADM3063E/ADM3065E/ADM3066E/ADM3067E/ADM3068E Data Sheet Rev. F | Page 4 of 28 GENERAL DESCRIPTION The ADM3061E/ADM3062E/ADM3063E/ADM3065E/ ADM3066E/ADM3067E/ADM3068E are 3.0 V to 5.5 V, IEC electrostatic discharge (ESD) protected RS-485 transceivers, allowing the devices to withstand ±12 kV contact discharges on the transceiver bus pins without latch-up or damage. The ADM3062E/ADM3066E/ADM3068E feature a VIO logic supply pin that allow a flexible digital interface capable of operating as low as 1.62 V. The ADM3065E/ADM3066E/ADM3067E/ADM3068E are suitable for high speed, 50 Mbps, bidirectional data commu- nication on multipoint bus transmission lines. The ADM3061E/ ADM3062E/ADM3063E/ADM3065E/ADM3066E/ADM3067E/ ADM3068E feature a 1/4 unit load input impedance that allows up to 128 transceivers on a bus. The ADM3061E/ADM3062E/ ADM3063E models offer all of the same features as the ADM3065E/ADM3066E/ADM3067E/ADM3068E models at a low 500 kbps data rate that is suitable for operation over long cable runs. The ADM3061E/ADM3062E/ADM3065E/ADM3066E are half- duplex RS-485 transceivers, fully compliant to the PROFIBUS® standard with increased 2.1 V bus differential voltage at VCC ≥ 4.5 V. The ADM3063E/ADM3067E/ADM3068E are full duplex RS-485 transceiver options. The RS-485 transceivers are available in a number of space- saving packages, such as the 10-lead, 3 mm × 3 mm lead frame chip-scale package (LFCSP), the 8-lead or 10-lead, 3 mm × 3 mm mini small outline package (MSOP), and the 8-lead or 14-lead, narrow body standard small outline packages (SOIC_N). Models with operating temperature ranges of −40°C to +125°C and −40°C to +85°C are available. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. If a significant temperature increase is detected in the internal driver circuitry during fault conditions, this feature forces the driver output into a high impedance state. The ADM3061E/ADM3062E/ADM3063E/ADM3065E/ ADM3066E/ADM3067E/ADM3068E guarantee a logic high receiver output when the receiver inputs are shorted, open, or connected to a terminated transmission line with all drivers disabled. Table 1 presents an overview of the ADM3061E/ADM3062E/ ADM3063E/ADM3065E/ADM3066E/ADM3067E/ADM3068E data rate capability across temperature, power supply, and package options. Refer to the Ordering Guide for model numbering. Table 1. Summary of the ADM3061E/ADM3062E/ADM3063E/ADM3065E/ADM3066E/ADM3067E/ADM3068E Operating Conditions—Data Rate Capability Across Temperature, Power Supply, and Package Maximum Data Rate1 Maximum VCC (V) Maximum Temperature Package Description 50 Mbps 5.5 −40°C to +125°C 10-lead LFCSP 50 Mbps 5.5 −40°C to +105°C 8-lead SOIC_N, 8-lead MSOP, 10-lead MSOP, and 14-lead SOIC_N 50 Mbps 3.6 −40°C to +125°C 8-lead SOIC_N, 8-lead MSOP, 10-lead MSOP, and 14-lead SOIC_N 500 kbps 5.5 −40°C to +125°C 8-lead SOIC_N, 8-lead MSOP, 10-lead MSOP, 10-lead LFCSP, and 14-lead SOIC_N 1 The ADM3065E/ADM3066E/ADM3067E/ADM3068E data input (DI) is transmitting 50 Mbps (or 500 kbps for the ADM3061E/ADM3062E/ADM3063E) clock data, and the ADM3061E/ADM3062E/ADM3063E/ADM3065E/ADM3066E/ADM3067E/ADM3068E driver enable (DE) is enabled for 50% of the DI transmit time |
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