IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

IXTA3N100P

IXTP3N100P

IXTH3N100P

Fig. 7. Input Admittance

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

3.03.5

4.04.5

5.05.5

6.06.5

25

- 40

Fig. 8. Transconductance

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

125

25

Fig. 9. Forward Voltage Drop of Intrinsic Diode

0

1

2

3

4

5

6

7

8

9

0.4

0.45

0.5

0.55

0.6

0.65

0.7

0.75

0.8

0.85

0.9

Fig. 10. Gate Charge

0

1

2

3

4

5

6

7

8

9

10

0

5

10

15

20

25

30

35

40

Fig. 11. Capacitance

10

100

1,000

10,000

0

5

10

15

20

25

30

35

40

Ciss

Crss

Coss

Fig. 12. Forward-Bias Safe Operating Area

0.1

1

10

10

100

1,000

Single Pulse

100μs

1ms

10ms