4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs and HS Hub

Datasheet

SMSC USB2601/USB2602

11

Revision 1.3 (05-25-05)

DATASHEET

Notes:

■

RBIAS is connected to the Analog Ground plane VSS via a resistor.

■

When the internal 1.8V regulators are enabled, VDD18 (Pin 86) & VDD18PLL (Pin 124), MUST

have a 10uf +/- 20%, (equivalent series resistance (ESR) <0.1ohm) bypass capacitor to VSS.

These capacitors must be as close to the pins as possible.

13

USBDN_

DP4

-

45

SM_nWP

8

77

CF_D0

8

109

VSS

-

14

VDDA33

-

46

SM_D0

8

78

CF_D1

8

110

USBUP_D

M

-

15

VDD33

-

47

SM_D1

8

79

CF_D8

8

111

USBUP_D

P

-

16

GR2

8

48

SM_D7

8

80

CF_D2

8

112

VDDA33

-

17

GR3

8

49

SM_D2

8

81

CF_D9

8

113

USBDN_D

P2

-

18

GR4

-

50

SM_D6

8

82

CF_D10

8

114

USBDN_D

M2

-

19

GPIO6

8

51

SM_D3

8

83

CF_nCD2

-

115

VSS

-

20

MS_BS

8

52

SM_D5

8

84

VSS

-

116

VBUS_

DET

12

21

MS_D1

8

53

SM_D4

8

85

VSS

-

117

VSS

-

22

MS_SDIO

/MS_D0

8

54

SM_nCD

-

86

VDD18

-

118

RESET_N

-

23

MS_D2

8

55

GPIO9

8

87

VDD33

-

119

VDD18

-

24

MS_INS

-

56

CF_nCD1

-

88

GPIO1

8

120

TEST

-

25

MS_D3

8

57

CF_D3

8

89

GPIO2

8

121

VSS

-

26

MS_

SCLK

8

58

CF_D11

8

90

GPIO7

8

122

XTAL2

-

27

SEL_CLK

DRV

-

59

CF_D4

8

91

VDD33

-

123

XTAL1/

CLKIN

-

28

CLK_SEL

1

-

60CF_D128

92

GPIO8/

CRD_PWR0

-

124

VDD18PLL

-

29

CLK_SEL

0

-

61

CF_D5

8

93

GPIO12

8

125

VDD33PLL

-

30

NC

-

62

CF_D13

8

94

GPIO13

8

126

ATEST

-

31

NC

-

63

CF_D6

8

95

GPIO14

8

127

RBIAS

-

32

NC

-

64

CF_D14

8

96

GPIO15

8

128

VSS

-

Table 3.2 USB2601/USB2602 128-Pin TQFP (continued)

PIN

#

NAME

MA

PIN

#

NAME

MA

PIN

#

NAME

MA

PIN

#

NAME

MA