SST49LF080A datasheet(13/49 Pages) SST

13 / 49 page

Data Sheet

8 Mbit LPC Flash

SST49LF080A

S71235-00-000

4/03

FIGURE 5: LPC WRITE CYCLE WAVEFORM

TABLE

6: LPC WRITE CYCLE

Clock

Cycle

Field

Name

Field Contents

LAD[3:0]1

LAD[3:0]

Direction

Comments

START

0000

LFRAME# must be active (low) for the part to respond.

Only the last start field (before LFRAME# transitions

high) should be recognized.

CYCTYPE +

DIR

011X

Indicates the type of cycle. Bits 3:2 must be “01b” for

memory cycle. Bit 1 indicates the type of transfer “1”

for Write. Bit 0 is reserved.

3-10

ADDRESS

YYYY

Address Phase for Memory Cycle. LPC protocol sup-

ports a 32-bit address phase. YYYY is one nibble of

the entire address. Addresses are transferred most-

significant nibble first. See Table 3 for address bits def-

inition and Table 4 for valid memory address range.

DATA

ZZZZ

This field is the least-significant nibble of the data byte.

DATA

ZZZZ

This field is the most-significant nibble of the data byte.

TAR0

1111

IN then Float

In this clock cycle, the host has driven the bus to all ‘1’s

and then floats the bus. This is the first part of the bus

“turnaround cycle.”

TAR1

1111 (float)

Float then OUT

The SST49LF080A takes control of the bus during this

cycle.

SYNC

0000

OUT

The SST49LF080A outputs the values 0000, indicat-

ing that it has received data or a flash command.

TAR0

1111

OUT then Float

In this clock cycle, the SST49LF080A has driven the

bus to all ‘1’s and then floats the bus. This is the first

part of the bus “turnaround cycle.”

TAR1

1111 (float)

Float then IN

Host resumes control of the bus during this cycle.

T6.0 1235

1. Field contents are valid on the rising edge of the present clock cycle.

1235 F05.0

LFRAME#

LAD[3:0]

0000b

011Xb

A[23:20] A[19:16]

A[3:0]

A[7:4]

A[11:8]

A[15:12]

1111b

Tri-State

2 Clocks

TAR0

Load Address in 8 Clocks

Address

1 Clock

Start

CYCTYPE

DIR

TAR

1 Clock

Sync

Data

Load Data in 2 Clocks

0000b

D[7:4]

D[3:0]

LCLK

CE#

A[31:28] A[27:24]

Data

TAR1

SST49LF080A 数据表(PDF) 13 Page - Silicon Storage Technology, Inc

SST49LF080A 数据表(HTML) 13 Page - Silicon Storage Technology, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

数据表下载

链接网址

SST49LF080A 数据表(PDF) 13 Page - Silicon Storage Technology, Inc

SST49LF080A 数据表(HTML) 13 Page - Silicon Storage Technology, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

数据表 下载

链接网址

数据表下载