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CDC305DR 数据表(PDF) 2 Page - Texas Instruments

部件名 CDC305DR
功能描述  OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER
PDF  7 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

CDC305DR 数据表(HTML) 2 Page - Texas Instruments

  CDC305DR Datasheet HTML 1Page - Texas Instruments CDC305DR Datasheet HTML 2Page - Texas Instruments CDC305DR Datasheet HTML 3Page - Texas Instruments CDC305DR Datasheet HTML 4Page - Texas Instruments CDC305DR Datasheet HTML 5Page - Texas Instruments CDC305DR Datasheet HTML 6Page - Texas Instruments CDC305DR Datasheet HTML 7Page - Texas Instruments  
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CDC305
OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER
SCAS326A – JUNE 1990 – REVISED NOVEMBER 1995
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
logic symbol†
C1
Q1
15
Q2
16
Q3
1
Q4
2
6
7
8
9
Q5
Q6
Q7
Q8
S
14
R
10
11
CLK
CLR
PRE
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
Q8
Q7
Q6
Q5
9
8
7
6
Q4
Q3
Q2
Q1
2
1
16
15
CLR
CLK
PRE
14
11
10
1D
R
C1
S
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage, VCC
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at TA = 55°C (in still air) (see Note 1): D package
0.77 W
. . . . . . . . . . . . . . . . . .
N package
1.2 W
. . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The maximum package power dissipation is calculated using a junction temperature of 150
°C and a board trace length of 300 mils,
except for the N package, which has a trace length of zero. For more information, refer to the
Package Thermal Considerations
application note in the 1994
ABT Advanced BiCMOS Technology Data Book, literature number SCBD002B.



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