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L6919ETR 数据表(PDF) 16 Page - STMicroelectronics

部件名 L6919ETR
功能描述  5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER WITH DYNAMIC VID MANAGEMENT
PDF  33 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6919ETR 数据表(HTML) 16 Page - STMicroelectronics

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L6919E
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Figure 10. Soft Start
INPUT CAPACITOR
The input capacitor is designed considering mainly the input RMS current that depends on the duty cycle as
reported in figure 11. Considering the dual-phase topology, the input RMS current is highly reduced comparing
with a single phase operation.
Figure 11. Input RMS Current vs. Duty Cycle (D) and Driving Relationships
It can be observed that the input rms value is one half of the single-phase equivalent input current in the worst
case condition that happens for D = 0.25 and D = 0.75.
The power dissipated by the input capacitance is then equal to:
Input capacitor is designed in order to sustain the ripple relative to the maximum load duty cycle. To reach the
high RMS value needed by the CPU power supply application and also to minimize components cost, the input
capacitance is realized by more than one physical capacitor. The equivalent RMS current is simply the sum of
the single capacitor's RMS current.
Input bulk capacitor must be equally divided between high-side drain mosfets and placed as close as possible
Timing Diagram
Acquisition:
(CH1=LGATEx; CH2=VCC; CH3=VOUT;
VCC=VCCDR
VLGATEx
PGOOD
VOUT
t
t
t
t
Turn ON threshold
2048 Clock Cycles
0.50
0.75
0.25
0.50
0.25
Single Phase
Dual Phase
Duty Cycle (VOUT/VIN)
>
<
=
0.5
D
if
D)
2
(2
1)
-
(2D
2
OUT
I
5
.
0
D
if
D)
2
(1
2D
2
OUT
I
rms
I
P
RM S
ESR
I
RM S
()
2
=



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