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VSC9182 数据表(PDF) 2 Page - Vitesse Semiconductor Corporation |
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VSC9182 数据表(HTML) 2 Page - Vitesse Semiconductor Corporation |
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2 / 2 page ![]() 741 Calle Plano Camarillo, CA 93012 Tel: 805.388.3700 Fax: 805.987.5896 www.vitesse.com Your Partner for Success. For more information on Vitesse Products visit the Vitesse web site at www.vitesse.com or contact Vitesse Sales at (800) VITESSE or sales@vitesse.com ©2002 Vitesse Semiconductor Corporation The VSC9182 is a 64x64 STS-12/STM-4 Time Slot Interchange Switch IC. A single device provides 40Gb/s of non-blocking STS-1 connectivity (768x768 STS-1) with support for concatenated tributaries. All STS-12/STM-4 inputs and outputs are differential serial signals running at 622 Mb/s for efficiency in switch card and system backplane design. Backplane BER monitoring and deskew are integrated, and the connection matrix can be hitlessly reconfigured. Path AIS or UNEQ can be optionally inserted into all 768 outgoing STS-1 tributaries. A standard asynchronous CPU interface with event interrupts is also supported. GENERAL DESCRIPTION: VSC9182 - 40G STS-1 Time Slot Interchange VSC9182 Architectures Asingle VSC9182 provides sufficient connectivity for a 16x16 OC-48 STS-1 grooming solution. Multiple VSC9182 devices can be used in a three layer Clos architecture to construct larger switches, up to 1024 OC-48 ports. The VSC9182 is designed to interface directly with the VSC9186 10Gb/s Pointer Processor & Frame Aligner and VSC9180 2.5Gb/s Backplane Transceiver. VSC9182 SYNCP/N FOSYNCP/N RXD[63...0]+/- SYSCLKP/N Clock Data Control indexer STS-12 Backplane Input Interfaces (64) 768x768 STS-1 Interconnection Matrix and Storage Clock Synthesis PLL Data Control CPU Interface STS-12 Backplane Output Interfaces (64) TXD[63...0]+/- Test Interface VSC9182 BLOCK DIAGRAM: |
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