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TMCS1100A2 数据表(PDF) 13 Page - Texas Instruments |
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TMCS1100A2 数据表(HTML) 13 Page - Texas Instruments |
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13 / 35 page ![]() Temperature (qC) -40 -20 0 20 40 60 80 100 120 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 D009 TMCS1100A1 TMCS1100A2 TMCS1100A3 TMCS1100A4 Temperature ( RC) -40 -20 0 20 40 60 80 100 120 -1 -0.5 0.5 1 0 D006 13 TMCS1100 www.ti.com SBOS820 – SEPTEMBER 2019 Product Folder Links: TMCS1100 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Feature Description (continued) 9.3.3.1 Temperature Stability System calibration at room temperature is a common practice for many applications. This initial calibration results in a very accurate measurement under the conditions at which calibration was performed because individual components of the total error are eliminated. As the ambient temperature changes as a result of device self- heating or environmental conditions, any drift in critical system parameters will reintroduce these errors into the system performance. For many systems, this drift in performance across temperature is the primary contributor to performance degradation at the system level. These variations in component parametric performance must be accounted for in total system error calculations. The TMCS1100 includes a proprietary temperature compensation technique, and results in best in industry parametric drift across the full temperature range. A zero- drift signal chain architecture and Hall sensor temperature stabilization methods enable stable sensitivity and minimize offset errors across temperature, and drastically improves system-level performance across the required operating conditions. Figure 3 shows the offset error across the full device ambient temperature range. Figure 4 shows the typical sensitivity. There are no other external components introducing errors sources; therefore, the high intrinsic accuracy and stability over temperature directly translates to system-level performance. As a result of this high precision, even a system with no calibration can reach < 1% of total error current-sensing capability. Figure 3. Offset Error Drift Across Temperature Figure 4. Sensitivity Drift Across Temperature |
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