M28W320FSU datasheet(5/49 Pages) STMICROELECTRONICS

5 / 49 page

5/49

M28W320FSU, M28W640FSU

SUMMARY DESCRIPTION

The M28W320FSU and the M28W640FSU are 32

Mbit (2Mbit x 16) and 64 Mbit (4Mbit x 16) Secure

Flash memories. The devices can be erased elec-

trically at block level and programmed in-system

on a Word-by-Word basis using a 2.7V to 3.6V

VDD supply for the circuitry and a 2.7V to 3.6V

VDDQ supply for the Input/Output pins. An optional

12V VPP power supply is provided to speed up

customer programming.

The M28W320FSU and M28W640FSU feature 32

Mbits and 64 Mbits respectively and are divided

into thirty-two and sixty-four 64-KWord Uniform

blocks, respectively. Refer to Figure 5. for a de-

tailed description of the devices memory architec-

ture and map.

All devices are equipped with hardware and soft-

ware block protection features to avoid unwanted

program/erase (modify) or read of the Flash mem-

ory content:

■

Hardware Protection:

–

When VPP ≤ VPPLK all blocks are

protected against program or erase.

■

Software Protection thanks to KRYPTO

Security Features:

–

Modify Protection: volatile and non-

volatile.

–

Read Protection.

The KRYPTO Security features are described in a

dedicated Application Note. Please contact STMi-

croelectronics for further details.

Two registers are available for protection purpose:

■

The Protection Register

■

The KRYPTO Protection Register.

The Protection Register is a 192 bit Protection

sign. The Protection Register is divided into a 64

bit segment and a 128 bit segment. The 64 bit seg-

ment contains a unique device number written by

ST, while the second one is one-time-programma-

ble by the user. The user programmable segment

can be permanently protected. Figure 6., shows

the Protection Register Memory Map.

The KRYPTO Protection Register is used to man-

age the Modify and Read protection modes. It also

features a Device Authentication mechanism. The

KRYPTO Protection Register is described in a

dedicated Application Note. Please contact STMi-

croelectronics for further details.

Each block can be erased separately. Erase can

be suspended in order to perform either read or

program in any other block and then resumed.

Program can be suspended to read data in any

other block and then resumed. Each block can be

programmed and erased over 100,000 cycles.

Program and Erase commands are written to the

Command Interface of the memory. An on-chip

Program/Erase Controller takes care of the tim-

ings necessary for program and erase operations.

The end of a program or erase operation can be

detected and any error conditions identified. The

command set required to control the memory is

consistent with JEDEC standards.

All the devices are offered in a TBGA64 (10 x

13mm) package. In addition to the standard ver-

sion, the package is also available in Lead-free

version, in compliance with JEDEC Std J-STD-

020B, the ST ECOPACK 7191395 Specification,

and the RoHS (Restriction of Hazardous Sub-

stances) directive. The package is compliant with

Lead-free soldering processes.

All devices are supplied with all the bits erased

(set to ’1’).

M28W320FSU 数据表(PDF) 5 Page - STMicroelectronics

M28W320FSU 数据表(HTML) 5 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

数据表下载