AT30TS75 datasheet(21/37 Pages) ATMEL

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AT30TS75 [DATASHEET]

Atmel-8748E-DTS-AT30TS75-Datasheet_092013

6.4

LOW and THIGH Limit Registers

The 16-bit T

LOW and THIGH Limit Registers store the user-programmable lower and upper temperature limits for the

temperature alarm. Like the Temperature Register, the temperature data values of the T

LOW and THIGH Limit Registers

are stored in the twos complement format with the MSB (bit 15) of the registers containing the sign bit (zero indicates a

positive number and a one indicates a negative number).

As with the Temperature Register, the resolution selected by the R1 and R0 bits of the Configuration Register will

determine how many bits of the T

LOW and THIGH Limit Registers will be used. Therefore, when writing to the TLOW and

HIGH Limit Registers, up to 12 bits of data will be recognized by the device with the remaining LSBs being internally fixed

to the Logic 0 state. Similarly, when reading from the registers, up to 12 bits of data will be output from the device with

the remaining LSBs fixed in the Logic 0 state.

Table 6-8.

LOW Limit Register and THIGH Limit Register Format

Note:

TD = Temperature Data

To set the value of either the T

LOW or THIGH Limit Register, the Master must first initiate a Start condition followed by the

AT30TS75 device address byte (1001AAA0 where "AAA" corresponds to the hard-wired A

2-0 address pins). After the

AT30TS75 has received the proper address byte, the device will send an ACK to the Master. The Master must then send

the appropriate Pointer Register byte of 02h to select the T

LOW Limit Register or 03h to select the THIGH Limit Register.

After the Pointer Register byte has been sent, the AT30TS75 will send another ACK to the Master. After receiving the

ACK from the AT30TS75, the Master must then send two data bytes to the AT30TS75 to set the value of the T

LOW or

HIGH Limit Register. Any subsequent bytes sent to the AT30TS75 will simply be ignored by the device. If the Master

does not send two complete bytes of data prior to issuing a Stop or repeated Start condition, then the AT30TS75 will

ignore the data and the contents of the register will not be changed.

In order to read the T

LOW or THIGH Limit Register, the Pointer Register must be set or have been previously set to 02h to

select the T

LOW Limit Register or 03h to select the THIGH Limit Register (if the previous operation was a Write to one of the

registers, then the Pointer Register will already be set for that particular limit register). If the Pointer Register has already

been set appropriately, the T

LOW or THIGH Limit Register can be read by having the Master first initiate a Start condition

followed by the AT30TS75 device address byte (1001AAA1 where "AAA" corresponds to the hard-wired A

2-0 address

pins). After the AT30TS75 has received the proper address byte, the device will send an ACK to the Master. The Master

can then read the upper byte of the T

LOW or THIGH Limit Register. After the upper byte of the register has been clocked

out of the AT30TS75, the Master must send an ACK to indicate that it is ready for the lower byte of data. The AT30TS75

will then clock out the lower byte of the register, after which the Master must send a NACK to end the operation. When

the AT30TS75 receives the NACK, it will release the SDA line so that the Master can send a Stop or repeated Start

condition. If the Master does not send a NACK but instead sends an ACK after the lower byte of the register has been

clocked out, then the device will repeat the sequence by outputting the data again starting with the upper byte of the

Resolution

Upper Byte

Lower Byte

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

12 bits

Sign

11 bits

Sign

10 bits

Sign

9 bits

Sign

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