H5TQ2G83CFR-RDC datasheet(22/33 Pages) HYNIX

22 / 33 page

Rev. 1.0 / Apr. 2013

Table 8 - IDD4W Measurement-Loop Patterna)

a) DM must be driven LOW all the time. DQS, DQS are used according to WR Commands, otherwise MID-LEVEL.

b) Burst Sequence driven on each DQ signal by Write Command. Outside burst operation, DQ signals are MID-LEVEL.

Table 9 - IDD5B Measurement-Loop Patterna)

a) DM must be driven LOW all the time. DQS, DQS are MID-LEVEL.

b) DQ signals are MID-LEVEL.

Datab)

00000000

2,3

D,D

00110011

6,7

D,D

8-15

repeat Sub-Loop 0, but BA[2:0] = 1

16-23

repeat Sub-Loop 0, but BA[2:0] = 2

24-31

repeat Sub-Loop 0, but BA[2:0] = 3

32-39

repeat Sub-Loop 0, but BA[2:0] = 4

40-47

repeat Sub-Loop 0, but BA[2:0] = 5

48-55

repeat Sub-Loop 0, but BA[2:0] = 6

56-63

repeat Sub-Loop 0, but BA[2:0] = 7

Datab)

REF

11.2

D, D

3,4

D, D

5...8

repeat cycles 1...4, but BA[2:0] = 1

9...12

repeat cycles 1...4, but BA[2:0] = 2

13...16

repeat cycles 1...4, but BA[2:0] = 3

17...20

repeat cycles 1...4, but BA[2:0] = 4

21...24

repeat cycles 1...4, but BA[2:0] = 5

25...28

repeat cycles 1...4, but BA[2:0] = 6

29...32

repeat cycles 1...4, but BA[2:0] = 7

33...nRFC-1

repeat Sub-Loop 1, until nRFC - 1. Truncate, if necessary.

H5TQ2G83CFR-RDC 数据表(PDF) 22 Page - Hynix Semiconductor

H5TQ2G83CFR-RDC 数据表(HTML) 22 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33

数据表下载