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STM32MP157DAC1 数据表(PDF) 126 Page - STMicroelectronics

部件名 STM32MP157DAC1
功能描述  Arm® dual Cortex®-A7 650 MHz Cortex®-M4 MPU, 3D GPU, TFT/DSI, 37 comm. interfaces, 29 timers, adv. analog
PDF  258 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32MP157DAC1 数据表(HTML) 126 Page - STMicroelectronics

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Electrical characteristics
STM32MP157A
126/258
DS12504 Rev 2
VDDA1V2 -
VSS
1.2 V supply (including VDDA1V2_DSI_REG,
VDDA1V2_DSI_PHY)
-0.3
1.98
V
VIN(2)
Input voltage on FT_xxx pins
VSS - 0.3
Min(VDD, VDDA,
VDD3V3_USB,
VBAT) +3.9(3)(4)
V
Input voltage on TT_xx pins
3.9
V
Input voltage on VBUS pin
6.0
V
Input voltage on USB/OTG_HS_DP/DM pins
5.25
V
Input voltage on OTG_FS_DP/DM pins
5.5
V
Input voltage on any other pins
3.9
V
|
VDDX|
Variations between different VDDX power pins
of the same domain
-50
mV
|VSSx-VSS| Variations between all the different ground pins
-
50
mV
1. All power (VDD, VDDA, VDD3V3_USB, VDDCORE, VBAT) and ground (VSS, VSSA, VSSX) pins must always be
connected to the external/internal power supply, in the permitted range.
2. VIN maximum must always be respected. Refer to Table 51 for the maximum allowed injected current
values.
3. This formula has to be applied on power supplies related to the IO structure described by the pin definition
table.
4. To sustain a voltage higher than 3.9 V the internal pull-up/pull-down resistors must be disabled.
Table 11. Current characteristics
Symbols
Ratings
Max
Unit
ΣIVDD
Total current into sum of all VDD power lines (source)(1)
1. All power (VDD, VDDA, VDD3V3_USB, VDDCORE) and ground (VSS, VSSA, VSSX) pins must always be
connected to the external/internal power supply, in the permitted range.
440
mA
ΣIVSS
Total current out of sum of all VSS ground lines (sink)(1)
440
IVDD
Maximum current into each VDD power pin (source)(1)
100
IVSS
Maximum current out of each VSS ground pin (sink)(1)
100
IIO
Output current sunk by any I/O and control pin
20
ΣI(PIN)
Total output current sunk by sum of all I/Os and control pins(2)
2. This current consumption must be correctly distributed over all I/Os and control pins. The total output
current must not be sunk/sourced between two consecutive power supply pins.
140
Total output current sourced by sum of all I/Os and control pins(2)
140
IINJ(PIN)(3)(4)
3. Positive injection is not possible on these I/Os and does not occur for input voltages lower than the
specified maximum value.
4. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. IINJ(PIN) must
never be exceeded. Refer also to Table 10: Voltage characteristics for the maximum allowed input voltage
values.
Injected current on FT_xxx, TT_xx, NRST pins except PA4, PA5
-5/+0
Injected current on PA4, PA5
-0/0
ΣIINJ(PIN)
Total injected current (sum of all I/Os and control pins)(5)
±25
Table 10. Voltage characteristics (continued)(1)
Symbols
Ratings
Min
Max
Unit



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