 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
HPC-DEV-ISE2 数据表(PDF) 1 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
HPC-DEV-ISE2 数据表(HTML) 1 Page - National Semiconductor (TI) |
|
|
1 / 30 page  TLDD10422 PRELIMINARY November 1992 HPC36400EHPC46400E High-Performance Communications MicroController General Description The HPC46400E is an upgraded HPC16400 Features have been added to support V120 the 8-bit mode has been en- hanced to support all instructions and the UART has been changed to provide more flexibility and power The HPC46400E is fully upward compatible with the HPC16400 The HPC46400E has 4 functional blocks to support a wide range of communication application-2 HDLC channels 4 channel DMA controller to facilitate data flow for the HDLC channels programmable serial interface and UART The serial interface decoder allows the 2 HDLC channels to be used with devices using interchip serial link for point-to- point and multipoint data exchanges The decoder gener- ates enable signals for the HDLC channels allowing multi- plexed D and B channel data to be accessed The HDLC channels manage the link by providing sequenc- ing using the HDLC framing along with error control based upon a cyclic redundancy check (CRC) Multiple address recognition modes and both bit and byte modes of opera- tion are supported The HPC36400E and HPC46400E are available in 68-pin PLCC and 80-pin PQFP packages Features Y HPCTM familycore features 16-bit data bus ALU and registers 64 kbytes of external memory addressing FAST200 MHz system clock Four 16-bit timercounters with WATCHDOGTM logic MICROWIREPLUSTM serial IO interface CMOSlow power with two power save modes Y Two full duplex HDLC channels Optimized for ISDN X25 V120 and LAPD applications Programmable frame address recognition Up to 465 Mbps serial data rate Built in diagnostics Synchronous bypass mode Optional CRC generation Received CRC bytes can be read by the CPU Y Four channel DMA controller Y 8- or 16-bit external data bus Y UART Full duplex 7 8 or 9 data bits Even odd mark space or no parity 78 1 or 2 stop bit generation Accurate internal baud rate generation up to 625k baud without penalty of using expensive crystal Synchronous and asynchronous modes of operation Y Serial Decoder Supports 6 popular time division multiplexing proto- cols for inter-chip communications Optional rate adaptation of 64 kbits data rate to 56 kbits Y Over Mbyte of extended addressing Y Easy interface to National’s DASL ‘U’ and ‘S’ trans- ceiversTP3400 TP3410 and TP3420 Y Commercial (0 Cto a70 C) and industrial (b40 Cto a 85 C) Block Diagram TLDD10422 – 1 TapePak and TRI-STATE are registered trademarks of National Semiconductor Corporation HPCTM MICROWIREPLUSTM and WATCHDOGTM are trademarks of National Semiconductor Corporation IBM PC-AT are registered trademarks of International Business Machines Corporation Sun is a registered trademark of Sun Microsystems SunOSTM is a trademark of Sun Microsystems UNIX is a registered trademark of ATT Bell Laboratories C1995 National Semiconductor Corporation RRD-B30M115Printed in U S A |
类似零件编号 - HPC-DEV-ISE2 |
|
类似说明 - HPC-DEV-ISE2 |
|
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
