13/23

L9929

6)

On the read access the databits at the SPI input SI are rejected.

7)

Invalid instruction/access: An instruction is invalid, if one of the following conditions is fulfilled:

– An unused instruction code is detected (see tables with SPI instructions).

– In case the previous transmission is not completed in terms of internal data processing. ( Violation of

the minimum Access-Time. )

– In case of the previous transmission has detected more than 16 SCK pulses

– Reset has occurred (Undervoltage on DMS)

If an invalid instruction is detected, any modifications on registers of L9929 are not allowed.

In case an unused instruction code occured the databyte "ffh ex" will be transmitted after having sent the check

byte.

In addition any access is invalid if the number of SPI clock pulses (falling edge) counted during active SS differs

from exactly 16 clock pulses (-> See Note).

5.4

SPI Communication

Figure 13. Reading access / 8 bit

5.5

SPI Instruction

The uppermost 2 bit of the instruction byte contains the chipadress. The chipaddress of L9929 is 00.

MSB

765432

10

0

0

INSTR5

INSTR4

INSTR3

INSTR2

INSR1

INSR0

SPI Instruction

Encoding

Description

bit 7,6

CPAD1,0

bit 5,4,3,2,1,0

INSTR(5...0)

RD_IDENT

00

000 000

Read identifier

RD_VERSION

00

000 011

Read version

RD_DIA

00

001 001

Read DIA_REG

All others

No function

SPI INSTRUCTION

MSB

XXXX XXXX

SS

SI

VERIFICATION BYTE

MSB

DATA/8 BIT

MSB

SO

D01AT480