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ADE7763 数据表(PDF) 32 Page - Analog Devices |
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ADE7763 数据表(HTML) 32 Page - Analog Devices |
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32 / 56 page ![]() ADE7763 Rev. A | Page 32 of 56 APPARENT ENERGY CALCULATION The apparent energy is given as the integral of the apparent power. ∫ = dt t Power Apparent Energy Apparent ) ( (26) The ADE7763 achieves the integration of the apparent power signal by continuously accumulating the apparent power signal in an internal 49-bit register. The apparent energy register (VAENERGY[23:0]) represents the upper 24 bits of this internal register. This discrete time accumulation or summation is equivalent to integration in continuous time. Equation 29 expresses this relationship. ⎪⎭ ⎪ ⎬ ⎫ ⎪⎩ ⎪ ⎨ ⎧ × = ∑ ∞ = → 0 0 ) ( n T T nT Power Apparent Lim Energy Apparent (27) where: n is the discrete number of time samples. T is the time sample period. The discrete time sample period (T) for the accumulation register is 1.1 µs (4/CLKIN). Figure 66 shows this discrete time integration or accumulation. The apparent power signal is continuously added to the internal register. This addition is a signed addition, even if the apparent energy always remains positive in theory. The 49 bits of the internal register are divided by VADIV. If the value in the VADIV register is 0, then the internal active energy register is divided by 1. VADIV is an 8-bit, unsigned register. The upper 24 bits are then written in the 24-bit apparent energy register (VAENERGY[23:0]). RVAENERGY register (24 bits long) is provided to read the apparent energy. This register is reset to 0 after a read operation. Figure 67 shows this apparent energy accumulation for full- scale signals (sinusoidal) on the analog inputs. The three curves illustrate the minimum time for the energy register to roll over when the VAGAIN registers content is equal to 0x7FF, 0x000, and 0x800. The VAGAIN register is used to carry out an apparent power calibration. As shown in the figure, the fastest integration time occurs when the VAGAIN register is set to maximum full scale, i.e., 0x7FF. VADIV APPARENT POWER + + VAENERGY[23:0] APPARENT POWER IS ACCUMULATED (INTEGRATED) IN THE APPARENT ENERGY REGISTER 23 0 48 0 48 0 % TIME (nT) T ACTIVE POWER SIGNAL = P Figure 66. Apparent Energy Calculation 0xFF FFFF 0x80 0000 0x40 0000 0x20 0000 0x00 0000 VAENERGY[23:0] 6.26 12.52 18.78 25.04 TIME (minutes) VAGAIN = 0x7FF VAGAIN = 0x000 VAGAIN = 0x800 Figure 67. Energy Register Rollover Time for Full-Scale Power (Maximum and Minimum Power Gain) Note that the apparent energy register is unsigned—see Figure 67. By using the interrupt enable register, the ADE7763 can be configured to issue an interrupt (IRQ) when the apparent energy register is more than half full or when an overflow occurs. The half full interrupt for the unsigned apparent energy register is based on 24 bits, as opposed to 23 bits for the signed active energy register. |
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