| 数据搜索系统,热门电子元器件搜索 |
|
PDTC114TMB 数据表(PDF) 4 Page - Nexperia B.V. All rights reserved |
|
|
|||||||||||||||||||||||||||||
PDTC114TMB 数据表(HTML) 4 Page - Nexperia B.V. All rights reserved |
|
4 / 12 page ![]() PDTC114TMB All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 1 — 21 June 2012 3 of 11 NXP Semiconductors PDTC114TMB NPN resistor-equipped transistor; R1 = 10 k Ω, R2 = open 5. Limiting values [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 5 V IO output current - 100 mA ICM peak collector current pulsed; tp ≤ 1 ms - 100 mA Ptot total power dissipation Tamb ≤ 25 °C [1] - 250 mW Tj junction temperature - 150 °C Tamb ambient temperature -65 150 °C Tstg storage temperature -65 150 °C FR4 PCB, standard footprint Fig 2. Power derating curve for DFN1006B-3 (SOT883B) Tamb (°C) -75 175 125 25 75 -25 006aad009 100 200 300 Ptot (mW) 0 |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |