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74LVC1G97GS 数据表(PDF) 1 Page - Nexperia B.V. All rights reserved

部件名 74LVC1G97GS
功能描述  Low-power configurable multiple function gate
PDF  20 Pages
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制造商  NEXPERIA [Nexperia B.V. All rights reserved]
网页  https://www.nexperia.com/
标志 NEXPERIA - Nexperia B.V. All rights reserved

74LVC1G97GS 数据表(HTML) 1 Page - Nexperia B.V. All rights reserved

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74LVC1G97
Low-power configurable multiple function gate
Rev. 6 — 8 August 2018
Product data sheet
1. General description
The 74LVC1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device can
be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and
buffer; using the 3-bit input. All inputs can be connected to VCC or GND.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices
as translators in mixed 3.3 V and 5 V environments.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing the damaging backflow current through the device when it is
powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V).
±24 mA output drive (VCC = 3.0 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C.


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