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CS5378 数据表(PDF) 83 Page - Cirrus Logic |
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CS5378 数据表(HTML) 83 Page - Cirrus Logic |
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83 / 86 page ![]() CS5378 DS639F1 83 21. PIN DESCRIPTION 1 2 3 4 5 6 7 821 22 23 24 25 26 27 28 9 10 11 12 17 18 19 20 13 14 15 16 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4:PLL0 GPIO5:PLL1 GPIO6:PLL2 TBSDATA VDDPAD GNDPAD MCLK MSYNC MDATA MFLAG GPIO7:BOOT SS:EECS MOSI MISO SCK DRDY GNDCORE VDDCORE TIMEB SYNC RESET CLK GNDPLL VDDPLL Figure 54. CS5378 Pin Assignments Pin Name Pin Number Pin Type Pin Description General Purpose Input / Output GPIO[0:3] 1, 2, 3, 4 Input / Output General Purpose I/O. GPIO[4:6]:PLL[0:2] 5, 6, 7 Input / Output General Purpose I/O with PLL mode select. GPIO pins have weak (~100 k Ω) internal pullups. PLL mode selection latched immediately after reset. GPIO7:BOOT 28 Input / Output General Purpose I/O with boot mode select. GPIO pins have weak (~100 k Ω) internal pullups. Boot mode selection latched immediately after reset. PLL[2:0] Reset Mode 111 32.768 MHz clock input (PLL bypass). 110 1.024 MHz clock input. 101 2.048 MHz clock input. 100 4.096 MHz clock input. 011 32.768 MHz clock input (PLL bypass). 010 1.024 MHz manchester input. 001 2.048 MHz manchester input. 000 4.096 MHz manchester input. BOOT Reset Mode 1 EEPROM boot 0 Microcontroller boot |
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