CS44800 datasheet(49/81 Pages) CIRRUS

49 / 81 page

DS632PP1

CS44800

7. REGISTER DESCRIPTION

All registers are read/write except for I.D. and Revision Register, Interrupt Status and Decimator OutD registers

which are read only. See the following bit definition tables for bit assignment information. The default state of each

bit after a power-up sequence or reset is listed in each bit description.

7.1

Memory Address Pointer (MAP)

Not a register

7.1.1

Increment (INCR)

Default = 1

Function:

memory address pointer auto increment control

–

0 - MAP is not incremented automatically.

–

1 - Internal MAP is automatically incremented after each read or write.

7.1.2

Memory Address Pointer (MAPx)

Default = 0000001

Function:

Memory address pointer (MAP). Sets the register address that will be read or written by the control port.

7.2

CS44800 I.D. and Revision Register (address 01h) (Read Only)

7.2.1

Chip I.D. (Chip_IDx)

Default = 1100

Function:

I.D. code for the CS44800. Permanently set to 1100.

7.2.2

Chip Revision (Rev_IDx)

Default = 0001

Function:

CS44800 revision level. Revision A is coded as 0001.

765

INCR

MAP6

MAP5

MAP4

MAP3

MAP2

MAP1

MAP0

765

CHIP_ID3

CHIP_ID2

CHIP_ID1

CHIP_ID0

REV_ID3

REV_ID2

REV_ID1

REV_ID0

CS44800 数据表(PDF) 49 Page - Cirrus Logic

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