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MAX7313 数据表(PDF) 3 Page - Maxim Integrated Products

部件名 MAX7313
功能描述  16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
PDF  27 Pages
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制造商  MAXIM [Maxim Integrated Products]
网页  https://www.maximintegrated.com/en.html
标志 MAXIM - Maxim Integrated Products

MAX7313 数据表(HTML) 3 Page - Maxim Integrated Products

  MAX7313 Datasheet HTML 1Page - Maxim Integrated Products MAX7313 Datasheet HTML 2Page - Maxim Integrated Products MAX7313 Datasheet HTML 3Page - Maxim Integrated Products MAX7313 Datasheet HTML 4Page - Maxim Integrated Products MAX7313 Datasheet HTML 5Page - Maxim Integrated Products MAX7313 Datasheet HTML 6Page - Maxim Integrated Products MAX7313 Datasheet HTML 7Page - Maxim Integrated Products MAX7313 Datasheet HTML 8Page - Maxim Integrated Products MAX7313 Datasheet HTML 9Page - Maxim Integrated Products Next Button
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16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = + 25°C.)
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TA = +25°C
0.15
0.26
TA = -40°C to +85°C
0.3
V+ = 2V, ISINK = 20mA
TA = TMIN to TMAX
0.32
TA = +25°C
0.13
0.23
TA = -40°C to +85°C
0.26
V+ = 2.5V, ISINK = 20mA
TA = TMIN to TMAX
0.28
TA = +25°C
0.12
0.23
TA = -40°C to +85°C
0.24
Output Low Voltage
P0–P15, INT/O16
VOL
V+ = 3.3V, ISINK = 20mA
TA = TMIN to TMAX
0.26
V
Output Low-Voltage SDA
VOLSDA
ISINK = 6mA
0.4
V
PWM Clock Frequency
fPWM
32
kHz
TIMING CHARACTERISTICS
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Serial Clock Frequency
fSCL
400
kHz
Bus Free Time Between a STOP and a START
Condition
tBUF
1.3
µs
Hold Time, Repeated START Condition
tHD, STA
0.6
µs
Repeated START Condition Setup Time
tSU, STA
0.6
µs
STOP Condition Setup Time
tSU, STO
0.6
µs
Data Hold Time
tHD, DAT
(Note 2)
0.9
µs
Data Setup Time
tSU, DAT
180
ns
SCL Clock Low Period
tLOW
1.3
µs
SCL Clock High Period
tHIGH
0.7
µs
Rise Time of Both SDA and SCL Signals, Receiving
tR
(Notes 3, 4)
20 +
0.1Cb
300
ns
Fall Time of Both SDA and SCL Signals, Receiving
tF
(Notes 3, 4)
20 +
0.1Cb
300
ns
Fall Time of SDA Transmitting
tF.TX
(Notes 2, 3, 5)
20 +
0.1Cb
250
ns
Pulse Width of Spike Suppressed
tSP
(Notes 2, 6)
50
ns
Capacitive Load for Each Bus Line
Cb
(Notes 2, 3)
400
pF



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