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74ACT257 数据表(PDF) 2 Page - ON Semiconductor

部件名 74ACT257
功能描述  Quad 2?묲nput Multiplexer with 3?뭆tate Outputs
PDF  12 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

74ACT257 数据表(HTML) 2 Page - ON Semiconductor

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MC74AC257, MC74ACT257
http://onsemi.com
2
PIN NAME
PIN
FUNCTION
S
Common Data Select Input
OE
3−State Output Enable Input
I0a−I0d
Data Inputs from Source 0
I1a−I1d
Data Inputs from Source 1
Za−Zd
3−State Multiplexer Outputs
TRUTH TABLE
Output
Enable
Select
Input
Data
Inputs
Outputs
OE
S
I0
I1
Z
H
X
X
X
Z
L
H
X
LL
L
H
X
HH
L
L
L
XL
L
L
H
X
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Figure 2. Logic Symbol
S
OE I0a I1a I0b I1b
Zb
I0c I1c I0d I1d
Za
Zc
Zd
FUNCTIONAL DESCRIPTION
The MC74AC257/74ACT257 is a quad 2−input
multiplexer with 3−state outputs. It selects four bits of data
from two sources under control of a Common Data Select
input. When the Select input is LOW, the I0x inputs are
selected and when Select is HIGH, the I1x inputs are
selected. The data on the selected inputs appears at the
outputs in true (noninverted) form. The device is the logic
implementation of a 4−pole, 2−position switch where the
position of the switch is determined by the logic levels
supplied to the Select input. The logic equations for the
outputs are shown below:
Za = OE(I1aS+I0aS)
Zb = OE(I1bS+I0bS)
Zc = OE(I1cS+I0cS)
Zd = OE(I1dS+I0dS)
When the Output Enable input (OE) is HIGH, the outputs
are forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure the Output Enable signals
to 3−state devices whose outputs are tied together are
designed so there is no overlap.



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