PR533 datasheet(6/36 Pages) NXP

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PR533_SDS

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Product short data sheet

COMPANY PUBLIC

Rev. 3.6 — 27 October 2014

206436

6 of 36

NXP Semiconductors

PR533

USB NFC integrated reader solution

OSCIN

AVDD

crystal oscillator input: input to the inverting amplifier of the oscillator. This pin

is also the input for an externally generated clock (fclk = 27.12 MHz).

OSCOUT

AVDD

crystal oscillator output: output of the inverting amplifier of the oscillator.

DVDD

interface mode lines: selects the used host interface; in test mode I0 is used

as test signals.

DVDD

TESTEN

DVDD

test enable pin:

when set to 1 enable the test mode.

when set to 0 reset the TCB and disable the access to the test mode.

P35

I/O

DVDD

general purpose I/O signal

P70_IRQ

I/O

PVDD

interrupt request: output to signal an interrupt event to the host (Port 7 bit 0)

RSTOUT_N

PVDD

output reset signal; when LOW it indicates that the circuit is in reset state.

DVSS

digital ground

I/O

PVDD

USB D

 data line in USB mode or TX in HSU mode; in test mode this signal

is used as input and output test signal

I/O

PVDD

USB D+ data line in USB mode or RX in HSU mode; in test mode this signal

is used as input and output test signal.

PVDD

I/O pad power supply

DELATT

PVDD

optional output for an external 1.5 k

 resistor connection on D+.

P30

I/O

PVDD

general purpose I/O signal. Can be configured to act either as RX line of the

second serial interface UART or general purpose I/O.

In test mode this signal is used as input and output test signal.

P31

I/O

PVDD

general purpose I/O signal. Can be configured to act either as TX line of the

second serial interface UART or general purpose I/O.

In test mode this signal is used as input and output test signal.

P32_INT0

I/O

PVDD

general purpose I/O signal. Can also be used as an interrupt source

In test mode this signal is used as input and output test signal.

P33_INT1

I/O

PVDD

general purpose I/O signal. Can be used to generate an HZ state on the out-

put of the selected interface for the Host communication and to enter into

power-down mode without resetting the internal state of PR533.

In test mode this signal is used as input and output test signal.

P50_SCL

I/O

DVDD

I2C-bus clock line - open-drain in output mode

SDA

I/O

DVDD

I2C-bus data line - open-drain in output mode

P34

I/O

SVDD

general purpose I/O signal or clock signal for the SAM

SIGOUT

SVDD

contactless communication interface output: delivers a serial data stream

according to NFCIP-1 and output signal for the SAM.

In test mode this signal is used as test signal output.

SIGIN

SVDD

contactless communication interface input: accepts a digital, serial data

stream according to NFCIP-1 and input signal from the SAM.

In test mode this signal is used as test signal input.

SVDD

output power for SAM power supply. Switched on by Firmware with an over-

load detection. Used as a reference voltage for SAM communication.

Table 3.

PR533 pin description …continued

Symbol

Type Pad ref

voltage

Description

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