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AM6548 数据表(PDF) 85 Page - Texas Instruments |
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AM6548 数据表(HTML) 85 Page - Texas Instruments |
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85 / 277 page  85 AM6548, AM6528, AM6546 AM6526, AM6527 www.ti.com SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019 Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Terminal Configuration and Functions Copyright © 2017–2019, Texas Instruments Incorporated 4.3.21 PRU_ICSSG 4.3.21.1 MAIN Domain NOTE The PRU_ICSSG contains a second layer of multiplexing to enable additional functionality on the PRU GPO and GPI signals. This internal wrapper multiplexing is described in the PRU_ICSSG chapter in the device TRM. Table 4-52. PRU_ICSSG0 Signal Descriptions SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] PRG0_ECAP0_IN_APWM_OUT PRU_ICSSG Enhanced Capture (ECAP) Input or Auxiliary PWM (APWM) Ouput IO V25 PRG0_ECAP0_SYNC_IN PRU_ICSSG ECAP Sync Input I U27 PRG0_ECAP0_SYNC_OUT PRU_ICSSG ECAP Sync Output O U26 PRG0_IEP0_EDIO_OUTVALID PRU_ICSSG Industrial Ethernet Digital I/O Outvalid O AD12 PRG0_IEP0_EDC_LATCH_IN0 PRU_ICSSG Industrial Ethernet Distributed Clock Latch Input I V25 PRG0_IEP0_EDC_LATCH_IN1 PRU_ICSSG Industrial Ethernet Distributed Clock Latch Input I U27 PRG0_IEP0_EDC_SYNC_OUT0 PRU_ICSSG Industrial Ethernet Distributed Clock Sync Output O U24 PRG0_IEP0_EDC_SYNC_OUT1 PRU_ICSSG Industrial Ethernet Distributed Clock Sync Output O U26 PRG0_IEP0_EDIO_DATA_IN_OUT28 PRU_ICSSG Industrial Ethernet Digital I/O Data Input/Output IO V26 PRG0_IEP0_EDIO_DATA_IN_OUT29 PRU_ICSSG Industrial Ethernet Digital I/O Data Input/Output IO U25 PRG0_IEP0_EDIO_DATA_IN_OUT30 PRU_ICSSG Industrial Ethernet Digital I/O Data Input/Output IO Y28 PRG0_IEP0_EDIO_DATA_IN_OUT31 PRU_ICSSG Industrial Ethernet Digital I/O Data Input/Output IO AA28 PRG0_IEP1_EDC_LATCH_IN0 PRU_ICSSG Industrial Ethernet Distributed Clock Latch Input I Y26 PRG0_IEP1_EDC_LATCH_IN1 PRU_ICSSG Industrial Ethernet Distributed Clock Latch Input I W28 PRG0_IEP1_EDC_SYNC_OUT0 PRU_ICSSG Industrial Ethernet Distributed Clock Sync Output O W26 PRG0_IEP1_EDC_SYNC_OUT1 PRU_ICSSG Industrial Ethernet Distributed Clock Sync Output O Y27 PRG0_MDIO0_MDC PRU_ICSSG MDIO Clock O AE28 PRG0_MDIO0_MDIO PRU_ICSSG MDIO Data IO AE26 PRG0_PRU0_GPI0 PRU_ICSSG PRU Data Input I V24 PRG0_PRU0_GPI1 PRU_ICSSG PRU Data Input I W25 PRG0_PRU0_GPI2 PRU_ICSSG PRU Data Input I W24 PRG0_PRU0_GPI3 PRU_ICSSG PRU Data Input I AA27 PRG0_PRU0_GPI4 PRU_ICSSG PRU Data Input I Y24 PRG0_PRU0_GPI5 PRU_ICSSG PRU Data Input I V28 PRG0_PRU0_GPI6 PRU_ICSSG PRU Data Input I Y25 PRG0_PRU0_GPI7 PRU_ICSSG PRU Data Input I U27 PRG0_PRU0_GPI8 PRU_ICSSG PRU Data Input I V27 PRG0_PRU0_GPI9 PRU_ICSSG PRU Data Input I V26 PRG0_PRU0_GPI10 PRU_ICSSG PRU Data Input I U25 |
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